MC9S08QD4_10 Datasheet, PDF (36/198 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 4 Memory Map and Register Definition
Address Register Name
0xFFAA – Reserved
0xFFAC
0xFFAD
Reserved for
ADCRL of AD26
value during ICS
trim
0xFFAE
Reserved for
ADCRH of AD26
value during ICS
trim and ICS Trim
value “FTRIM”
0xFFAF
Reserved for
ICS Trim value
“TRIM”
0xFFB0 – NVBACKKEY
0xFFB7
0xFFB8 – Reserved
0xFFBC
0xFFBD NVPROT
0xFFBE Unused
0xFFBF NVOPT
Table 4-4. Nonvolatile Register Summary
Bit 7
6
5
4
3
—
—
—
—
—
—
—
—
—
—
ADR7
ADR6
ADR5
ADR4
ADR3
ADR9
ADR8
—
—
—
TRIM
8-Byte Comparison Key
—
—
—
—
—
—
—
—
—
—
FPS
—
—
—
—
—
KEYEN FNORED
0
0
0
2
—
—
ADR2
—
—
—
—
0
1
Bit 0
—
—
—
—
ADR1
ADR0
—
FTRIM
—
—
—
SEC01
—
—
FPDIS
—
SEC00
Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily
disengage memory security. This key mechanism can be accessed only through user code running in secure
memory. (A security key cannot be entered directly through background debug commands.) This security
key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the
only way to disengage security is by mass erasing the flash if needed (normally through the background
debug interface) and verifying that flash is blank. To avoid returning to secure mode after the next reset,
program the security bits (SEC01:SEC00) to the unsecured state (1:0).
The ICS factory-trimmed value will be stored in 0xFFAE (bit-0) and 0xFFAF. Development tools, such as
programmers can trim the ICS and the internal temperature sensor (via the ADC) and store the values in
0xFFAD–0xFFAF.
4.4 RAM
The MC9S08QD4 series includes static RAM. The locations in RAM below 0x0100 can be accessed using
the more efficient direct addressing mode, and any single bit in this area can be accessed with the bit
manipulation instructions (BCLR, BSET, BRCLR, and BRSET). Locating the most frequently accessed
program variables in this area of RAM is preferred.
The RAM retains data when the MCU is in low-power wait, stop2, or stop3 mode. At power-on or after
wakeup from stop1, the contents of RAM are uninitialized. RAM data is unaffected by any reset provided
that the supply voltage does not drop below the minimum value for RAM retention (V_RAM).
MC9S08QD4 Series MCU Data Sheet, Rev. 6
36
Freescale Semiconductor