XPC8240LZU200E Datasheet, PDF (3/8 Pages) Freescale Semiconductor, Inc – MPC8240 Part Number Specification for the XPC8240RXXnnnx Series

Freescale Semiconductor, Inc.
General Parameters
Table 2. Recommended Operating Conditions (continued)
Characteristic
Symbol
Recommended
Value
Unit
Notes
Die-junction temperature
T_j
0 to 105
°C
Notes:
1. These are the recommended and tested operating conditions. Proper device operation outside of these conditions
is not guaranteed.
2. These signals are designed to withstand LV_DD + 0.5 V DC when LV_DD is connected to a 3.3- or 5.0-V DC power
supply.
3. LV_DD input tolerant signals: PCI interface, EPIC control, and OSC_IN signals.
4. See Section 1.9, “Ordering Information,” for details on a modified voltage (V_DD) version device.
Cautions:
5. Input voltage (V_in) must not be greater than the supply voltage (V_DD/AV_DD/AV_DD2/LAV_DD) by more than 2.5 V at all
times, including during power-on reset.
6. OV_DD must not exceed V_DD/AV_DD/AV_DD2/LAV_DD by more than 1.8 V at any time, including during power-on reset.
This limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
7. V_DD/AV_DD/AV_DD2/LAV_DD must not exceed OV_DD by more than 0.6 V at any time, including during power-on reset.
This limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
8. GV_DD must not exceed V_DD/AV_DD/AV_DD2/LAV_DD by more than 1.8 V at any time, including during power-on reset.
This limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
9. LV_DD must not exceed V_DD/AV_DD/AV_DD2/LAV_DD by more than 5.4 V at any time, including during power-on reset.
This limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
10.LV_DD must not exceed OV_DD by more than 3.6 V at any time, including during power-on reset. This limit may be
exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
1.4.1.5 Power Characteristics
Table 5 provides power consumption data for the MPC8240. Power consumption on the PLL supply pins (AV_DD
and AV_DD2) and the DLL supply pin (LAVDD) less than 15 mW. This parameter is guaranteed by design and is not
tested.
Table 5. Preliminary Power Consumption
Mode
Typical
Maximum—FP
Maximum—INT
Doze
Nap
Sleep
33/66/233
PCI Bus Clock/Memory Bus Clock
CPU Clock Frequency (MHz)
Unit Notes
33/83/250 33/100/200 33/100/250 66/100/200 66/100/250
3.4
3.6
3.2
3.7
3.2
3.8
W 1, 5
3.8
4.1
3.6
4.2
3.6
4.3
W 1, 2
3.4
3.7
3.3
3.8
3.4
3.8
W 1, 3
2.2
2.4
2.2
2.6
2.2
2.6
W 1, 4, 6
700
800
900
900
900
900
mW 1, 4, 6
500
500
500
500
800
800
mW 1, 4, 6
I/O Power Supplies
Mode
Typical—OV_DD
Minimum
200
Maximum
600
Unit Notes
mW 7, 8
MPC8240 Part Number Specification for the XPC8240RXXnnnx Series
3
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