MKL15Z32VLH4 Datasheet, PDF (29/52 Pages) Freescale Semiconductor, Inc – KL15 Sub-Family Data Sheet

Peripheral operating requirements and behaviors
Table 14. Oscillator frequency specifications (continued)
Symbol
t_cst
Description
Crystal startup time — 32 kHz low-frequency,
low-power mode (HGO=0)
Crystal startup time — 32 kHz low-frequency,
high-gain mode (HGO=1)
Crystal startup time — 8 MHz high-frequency
(MCG_C2[RANGE]=01), low-power mode
(HGO=0)
Crystal startup time — 8 MHz high-frequency
(MCG_C2[RANGE]=01), high-gain mode
(HGO=1)
Min.
—
—
—
—
Typ.
750
250
0.6
1
Max.
—
—
—
—
Unit
Notes
ms
3, 4
ms
ms
ms
1. Other frequency limits may apply when external clock is being used as a reference for the FLL or PLL.
2. When transitioning from FBE to FEI mode, restrict the frequency of the input clock so that, when it is divided by FRDIV, it
remains within the limits of the DCO input clock frequency.
3. Proper PC board layout procedures must be followed to achieve specifications.
4. Crystal startup time is defined as the time between the oscillator being enabled and the OSCINIT bit in the MCG_S register
being set.
6.4 Memories and memory interfaces
6.4.1 Flash electrical specifications
This section describes the electrical characteristics of the flash memory module.
6.4.1.1 Flash timing specifications — program and erase
The following specifications represent the amount of time the internal charge pumps are
active and do not include command overhead.
Table 15. NVM program/erase timing specifications
Symbol
t_hvpgm4
t_hversscr
t_hversall
Description
Longword Program high-voltage time
Sector Erase high-voltage time
Erase All high-voltage time
Min.
—
—
—
Typ.
7.5
13
52
Max.
18
113
452
Unit
Notes
μs
ms
1
ms
1
1. Maximum time based on expectations at cycling end-of-life.
KL15 Sub-Family Data Sheet Data Sheet, Rev. 3, 9/19/2012.
Freescale Semiconductor, Inc.
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