MKL15Z32VLH4 Datasheet, PDF (14/52 Pages) Freescale Semiconductor, Inc – KL15 Sub-Family Data Sheet

General
5.2.5 Power consumption operating behaviors
Table 5. Power consumption operating behaviors
Symbol Description
I_DDA Analog supply current
I_{DD_RUNCO_} Run mode current in compute operation - 48
CM
MHz core / 24 MHz flash/ bus disabled, LPTMR
running using 4MHz internal reference clock,
CoreMark® benchmark code executing from
flash
• at 3.0 V
Min.
—
—
Typ.
Max.
Unit
—
See note
mA
6.4
—
mA
I_{DD_RUNCO} Run mode current in compute operation - 48
MHz core / 24 MHz flash / bus clock disabled,
code of while(1) loop executing from flash
• at 3.0 V
—
4.1
5.2
mA
I_{DD_RUN} Run mode current - 48 MHz core / 24 MHz bus
and flash, all peripheral clocks disabled, code of
while(1) loop executing from flash
• at 3.0 V
—
5.1
6.3
mA
I_{DD_RUN}
Run mode current - 48 MHz core / 24 MHz bus
and flash, all peripheral clocks enabled, code of
while(1) loop executing from flash
• at 3.0 V
• at 25 °C
—
• at 125 °C
—
6.4
7.8
mA
6.8
8.3
mA
I_{DD_WAIT} Wait mode current - core disabled / 48 MHz
system / 24 MHz bus / flash disabled (flash doze
—
enabled), all peripheral clocks disabled
• at 3.0 V
3.7
5.0
mA
I_{DD_WAIT} Wait mode current - core disabled / 24 MHz
system / 24 MHz bus / flash disabled (flash doze
—
enabled), all peripheral clocks disabled
• at 3.0 V
2.9
4.2
mA
I_{DD_PSTOP2} Stop mode current with partial stop 2 clocking
option - core and system disabled / 10.5 MHz
—
2.5
3.7
mA
bus
• at 3.0 V
I_{DD_VLPRCO} Very low power run mode current in compute
operation - 4 MHz core / 0.8 MHz flash / bus
—
188
570
μA
clock disabled, code of while(1) loop executing
from flash
• at 3.0 V
I_{DD_VLPR} Very low power run mode current - 4 MHz core /
0.8 MHz bus and flash, all peripheral clocks
—
224
613
μA
disabled, code of while(1) loop executing from
flash
• at 3.0 V
Notes
1
2
3
3
3, 4,
3
3
3
5
5
Table continues on the next page...
KL15 Sub-Family Data Sheet Data Sheet, Rev. 3, 9/19/2012.
14
Freescale Semiconductor, Inc.