MC10XS3535 Datasheet, PDF (29/45 Pages) Freescale Semiconductor, Inc – Smart Front Corner Light Switch

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
ADDRESS 00000 — INITIALIZATION
The Initialization register is used to read the various
statuses, choose one of the six outputs current recopy, load
the H7 bulbs profile for OUT2 only, enable the FOG pin and
synchronize the switching phases between different devices.
The register bits D1 and D0 determine the content of the 16
bits of the next SO data. (Refer to the section entitled Serial
Output Communication (Device Status Return Data)
beginning on page 30.) Table 8 describes the register of
initialization.
The watchdog timeout is specified by t _WDTO parameter. As
long as the WD bit (D10) of an incoming SPI message is
toggled within the minimum watchdog timeout period
(WDTO), the device will operate normally. If an internal
watchdog timeout occurs before the WD bit is toggled, the
device will revert to Fail mode. All registers are cleared. To
exit the Fail mode, send valid SPI communication with
WD bit = 1.
Table 8. Initialization Register
SI Address
D15 D14 D13 D12 D11 D10 D9
0
0
0
0
0
WD
0
SI Data
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
FOGen
PWM
sync
Xenon MUX2
MUX1
MUX0
SOA1
SOA0
D6 (PWM sync) = 0, No synchronization
D6 (PWM sync) = 1, Synchronization on CSB positive edge
D5 (Xenon) = 0, Xenon
D5 (Xenon) = 1, H7 Bulb
D7 (FOGen) = 0, FOG pin does not control the output 4
D7 (FOGen) = 1, FOG input controls the output 4
D4, D3, D2 (MUX2, MUX1, MUX0) = 000, No current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 001, OUT1 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 010, OUT2 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 011, OUT3 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 100, OUT4 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 101, OUT5 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 110, External Switch current
sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 111, Temperature analog
feedback
ADDRESS 00001 — CONFIGURATION OL
The Configuration OL register is used to enable the open
load detection for LEDs in Normal Mode (OLLEDn in Table 7,
page 28) and to active the LED Control.
When bit D0 is set to logic [1], the open load detection
circuit for LED is activated for output 1. When bit D0 is set to
logic [0], open load detection circuit for standard bulbs is
activated for output 1.
When bit D5 is set to logic [1], the LED Control is activated
for output 1.
ADDRESS 00010 — CONFIGURATION PRESCALER
AND SR
Two configuration registers are available at this address.
The Configuration Prescaler when D9 bit is set to logic [0] and
Configuration SR when D9 bit is set to logic [1].
The Configuration Prescaler register is used to enable the
PWM clock prescaler per output. When the corresponding
PR bit is set to logic [1], the clock prescaler (reference clock
divided by 2) is activated for the dedicated output.
The SR Prescaler register is used to increase the output
slew-rate by a factor of 2. When the corresponding SR bit is
set to logic [1], the output switching time is divided by 2 for the
dedicated output.
ADDRESS 00011 — CONFIGURATION CSNS
The Configuration Current Sense register is used to
disable the high over-current shutdown phase (OCHI1 and
OCHI2 dynamic levels) in order to activate immediately the
current sense analog feedback.
When bit D9 is set to logic [1], the current sense
synchronization signal is reported on FETOUT output pin.
When the corresponding NO_OCHI bit is set to logic [1],
the output is only protected with OCLO level. And the current
sense is immediately available if it is selected through SPI, as
described in Figures 13. The NO_OCHI bit per output is
automatically reset at each corresponding ONoff bit transition
from logic [1] to [0] and in case of over-temperature or over-
current fault. All NO_OCHI bits are also reset in case of
under-voltage fault detection.
ADDRESS 01001 — CONTROL OUT1
Bits D9 and D8 control the switching phases as shown in
Table 9.
Table 9. Switching Phases
D9 : D8
PWM Phase
00
0°
01
90°
Analog Integrated Circuit Device Data
Freescale Semiconductor
10XS3535
29