DSP56303 Datasheet, PDF (279/292 Pages) Freescale Semiconductor, Inc – DSP56303 USER’S MANUAL

Index
A
adder 1-7
Address Arithmetic Logic Unit (Address ALU) 1-7
Address Attribute Priority Disable (APD) bit 4-13
Address Attribute Registers (AAR) 4-21, 4-26
Bus Access Type (BAT) 4-28
Bus Address Attribute Polarity (BAAP) 4-27
Bus Address to Compare (BAC) 4-26
Bus Number of Address Bits to Compare (BNC) 4-26
Bus Packing Enable (BPAC) 4-27
Bus Program Memory Enable (BPEN) 4-27
Bus X Data Memory Enable (BXEN) 4-27
Bus Y Data Memory Enable (BYEN) 4-27
programming sheet B-16
Address Generation Unit (AGU) 1-7
Address Mode Wakeup 8-3
Address Trace Enable (ATE) bit 4-13
Address Trace mode 1-5
addressing modes 1-8
Alignment Control (ALC) bit 7-14
Arithmetic Saturation Mode (SM) bit 4-8
Asynchronous Bus Arbitration Enable (ABE) bit 4-13
asynchronous data transfer 8-2
Asynchronous mode 7-9, 8-2, 8-13, 8-15, 8-16
Asynchronous Multidrop mode 8-15
B
barrel shifter 1-6
bit-oriented instructions 5-1
BCHG 5-1
BCLR 5-1
BRCLR 5-1
BRSET 5-1
BSCLR 5-1
BSET 5-1
BSSET 5-1
BTST 5-1
JCLR 5-1
JSCLR 5-1
JSET 5-1
JSSET 5-1
bootstrap 3-1, 3-2
code 8-7
program 4-6, A-1
program options, invoking 4-6
ROM 1-5
Boundary Scan Register (BSR) 4-34
Burst Mode Enable (BE) bit 4-14
bus
address 2-2
data 2-2
external address 2-5
external data 2-5
internal 1-10
multiplexed 2-2
non-multiplexed 2-2
Bus Access Type (BAT) bits 4-28
Bus Address Attribute Polarity (BAAP) bit 4-27
Bus Address to Compare (BAC) bits 4-26
Bus Area 0 Wait State Control (BA0W) bits 4-23
Bus Area 1 Wait State Control (BA1W) bits 4-23
Bus Area 2 Wait State Control (BA2W) bits 4-22
Bus Area 3 Wait State Control (BA3W) bits 4-22
Bus Column In-Page Wait State (BCW) bit 4-25
Bus Control Register (BCR) 4-21
Bit Definitions 4-22
Bus Area 0 Wait State Control (BA0W) 4-23
Bus Area 1 Wait State Control (BA1W) 4-23
Bus Area 2 Wait State Control (BA2W) 4-22
Bus Area 3 Wait State Control (BA3W) 4-22
Bus Default Area Wait State Control (BDFW) 4-22
Bus Request Hold (BRH) 4-22
Bus Request Hold (BRH) bit 4-22
Bus State (BBS) bit 4-22
programming sheet B-14
Bus Default Area Wait State Control (BDFW) bits 4-22
Bus DRAM Page Size (BPS) bit 4-25
Bus Interface Unit (BIU)
Address Attribute Registers (AAR) 4-21
Bus Control Register (BCR) 4-21
DRAM Control Register (DCR) 4-21
Bus Mastership Enable (BME) bit 4-25
Bus Number of Address Bits to Compare (BNC) bits 4-26
Bus Packing Enable (BPAC) bit 4-27
Freescale Semiconductor
DSP56303 User’s Manual, Rev. 2
Index-1