DSP56303 Datasheet, PDF (22/292 Pages) Freescale Semiconductor, Inc – DSP56303 USER’S MANUAL

DSP56303 Overview
1.9 Peripherals
In addition to the core features, the DSP56303 provides the following peripherals:
„ As many as 34 user-configurable GPIO signals
„ HI08 to external hosts
„ Dual ESSI
„ SCI
„ Triple timer module
„ Memory switch mode
„ Four external interrupt/mode control lines
1.9.1 GPIO Functionality
The GPIO port consists of up to 34 programmable signals, also used by the peripherals (HI08,
ESSI, SCI, and timer). There are no dedicated GPIO signals. After a reset, the signals are
automatically configured as GPIO. Three memory-mapped registers per peripheral control GPIO
functionality. Programming techniques for these registers to control GPIO functionality are
detailed in Chapter 5, Programming the Peripherals.
1.9.2 HI08
The HI08 is a byte-wide, full-duplex, double-buffered parallel port that can connect directly to
the data bus of a host processor. The HI08 supports a variety of buses and provides connection
with a number of industry-standard DSPs, microcomputers, and microprocessors without
requiring any additional logic. The DSP core treats the HI08 as a memory-mapped peripheral
occupying eight 24-bit words in data memory space. The DSP can use the HI08 as a
memory-mapped peripheral, using either standard polled or interrupt programming techniques.
Separate double-buffered transmit and receive data registers allow the DSP and host processor to
transfer data efficiently at high speed. Memory mapping allows you to program DSP core
communication with the HI08 registers using standard instructions and addressing modes.
1.9.3 ESSI
The DSP56303 provides two independent and identical ESSIs. Each ESSI has a full-duplex serial
port for communication with a variety of serial devices, including one or more industry-standard
codecs, other DSPs, microprocessors, and peripherals that implement the Freescale SPI. The
ESSI consists of independent transmitter and receiver sections and a common ESSI clock
generator. ESSI capabilities include the following:
„ Independent (asynchronous) or shared (synchronous) transmit and receive sections with
separate or shared internal/external clocks and frame syncs
„ Normal mode operation using frame sync
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DSP56303 User’s Manual, Rev. 2
Freescale Semiconductor