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MC9S08DZ60ACLH Datasheet, PDF (247/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features | |||
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Chapter 12 Freescaleâs Controller Area Network (S08MSCANV1)
Field
7:5
ID[2:0]
4
RTR
3
IDE
Table 12-30. IDR1 Register Field Descriptions
Description
Standard Format Identiï¬er â The identiï¬ers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most signiï¬cant bit and is transmitted ï¬rst on the CAN bus during the arbitration procedure. The priority of an
identiï¬er is deï¬ned to be highest for the smallest binary number. See also ID bits in Table 12-29.
Remote Transmission Request â This ï¬ag reï¬ects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this ï¬ag deï¬nes the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended â This ï¬ag indicates whether the extended or standard identiï¬er format is applied in this buffer. In
the case of a receive buffer, the ï¬ag is set as received and indicates to the CPU how to process the buffer
identiï¬er registers. In the case of a transmit buffer, the ï¬ag indicates to the MSCAN what type of identiï¬er to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
7
6
5
4
3
2
1
0
R
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read âxâ
Figure 12-31. Identiï¬er Register 2 â Standard Mapping
7
6
5
4
3
2
1
0
R
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read âxâ
Figure 12-32. Identiï¬er Register 3 â Standard Mapping
12.4.3 Data Segment Registers (DSR0-7)
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
247
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