K60P144M150SF3_1210 Datasheet, PDF (24/88 Pages) Freescale Semiconductor, Inc – K60 Sub-Family

Peripheral operating requirements and behaviors
Board type Symbol
Description 144 LQFP
—
Ψ_JT
Thermal
2
characterization
parameter,
junction to
package top
outside center
(natural
convection)
144
MAPBGA
2
Unit
°C/W
Notes
4
1.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method
Environmental Conditions—Forced Convection (Moving Air).
2.
Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board.
3.
Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
4.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
5.5 Power sequencing
Voltage supplies must be sequenced in the proper order to avoid damaging internal
diodes. There is no limit on how long after one supply powers up before the next supply
must power up. Note that V_DD and V_{DD_INT} can use the same power source.
The power-up sequence is:
1. V_DD
2. V_{DD_INT}
3. V_DDA
4. V_{DD_DDR}
The power-down sequence is the reverse:
1. V_{DD_DDR}
2. V_DDA
3. V_{DD_INT}
4. V_DD
6 Peripheral operating requirements and behaviors
6.1 Core modules
K60 Sub-Family Data Sheet, Rev. 4, 10/2012.
24
Freescale Semiconductor, Inc.