908E425 Datasheet, PDF (22/49 Pages) Freescale Semiconductor, Inc – Integrated Quad Half H-Bridge with Power Supply, Embedded MCU, and LIN Serial Communication

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
INTERRUPT MASK REGISTER (IMR)
Register Name and Address: IMR - $04
Bits 7
6
5
4
3
2
1
0
Read 0 HPIE LINIE HTIE LVIE HVIE OCIE 0
Write
Reset 0
0
0
0
0
0
0
0
HALL-EFFECT SENSOR INPUT PIN INTERRUPT
ENABLE BIT (HPIE )
This read / write bit enables CPU interrupts by the Hall-
effect sensor input pin flag, HPF. Reset clears the HPIE bit.
• 1 = Interrupt requests from HPF flag enabled
• 0 = Interrupt requests from HPF flag disabled
LIN LINE INTERRUPT ENABLE BIT (LINIE )
This read / write bit enables CPU interrupts by the LIN flag,
LINF. Reset clears the LINIE bit.
• 1 = Interrupt requests from LINF flag enabled
• 0 = Interrupt requests from LINF flag disabled
HIGH-TEMPERATURE INTERRUPT ENABLE BIT (HTIE )
This read / write bit enables CPU interrupts by the high-
temperature flag, HTF. Reset clears the HTIE bit.
• 1 = Interrupt requests from HTF flag enabled
• 0 = Interrupt requests from HTF flag disabled
LOW-VOLTAGE INTERRUPT ENABLE BIT (LVIE )
This read / write bit enables CPU interrupts by the low-
voltage flag, LVF. Reset clears the LVIE bit.
• 1 = Interrupt requests from LVF flag enabled
• 0 = Interrupt requests from LVF flag disabled
HIGH-VOLTAGE INTERRUPT ENABLE BIT (HVIE )
This read / write bit enables CPU interrupts by the high-
voltage flag, HVF. Reset clears the HVIE bit.
• 1 = Interrupt requests from HVF flag enabled
• 0 = Interrupt requests from HVF flag disabled
OVERCURRENT INTERRUPT ENABLE BIT (OCIE )
This read / write bit enables CPU interrupts by the
overcurrent flag, OCF. Reset clears the OCIE bit.
• 1 = Interrupt requests from OCF flag enabled
• 0 = Interrupt requests from OCF flag disabled
908E425
22
Analog Integrated Circuit Device Data
Freescale Semiconductor