MC13201_07 Datasheet, PDF (21/28 Pages) Freescale Semiconductor, Inc – 2.4 GHz Low Power Transceiver for the IEEE® 802.15.4 Standard

— MC9S08GT devices have IO signals that are not pinned-out on the package. These signals must
also be initialized (even though they cannot be used) to prevent floating inputs.
8.4 Transceiver RF Configurations and External Connections
The MC13201 radio has features that allow for a flexible as well as low cost RF interface:
• Programmable output power — 0 dBm nominal output power, programmable from -27 dBm to +4
dBm typical
• <-91 dBm (typical) receive sensitivity — At 1% PER, 20-byte packet (well above 802.15.4
Standard of -85 dBm)
• Optional integrated transmit/receive (T/R) switch for low cost operation — With internal PAs and
LNA, the internal T/R switch allows a minimal part count radio interface using only a single balun
to interface to a single-ended antenna
• Maximum flexibility — There are full differential RF I/O pins for use with the internal T/R switch.
Optionally, these pins become the RF_IN signals and a separate set of full differential PA outputs
are also provided. Separate inputs and outputs allow for a variety of RF configurations including
external LNA and PA for increased range
• CT_Bias Output — The CT_Bias signal provides a switched bias reference for use with the internal
T/R switch, and alternatively can be programmed as an antenna switch signal for use with an
external antenna switch
• Onboard trim capability for 16 MHz crystal reference oscillator — The 802.15.4 Standard puts a
+/- 40 ppm requirement on the carrier frequency. The onboard trim capability of the modem crystal
oscillator eliminates need for external variable capacitors and allows for automated production
frequency calibration. Also tighter tolerance can produce greater receive sensitivity
8.5 RF Interface Pins
Figure 12 shows the RF interface pins and the associated analog blocks. Notice that separate PA blocks
are associated with RFIN_x and PAO_x signal pairs. The RF interface allows both single port differential
operation and dual port differential operation.
2 RFIN_P (PAO_P)
1 RFIN_M (PAO_M)
3 CT_Bias
5
PAO_P
6
PAO_M
PA1
RX
SW ITCH
LNA
PA2
RX ENABLE
PA2 ENABLE
CT_Bias Generator
CT_Bias CONTROL
FROM TX PSM
PA1 ENABLE
RX
SIGNAL
Figure 12. RF Interface Pins
MC13201 Technical Data, Rev. 1.1,
Freescale Semiconductor
21