33793 Datasheet, PDF (19/27 Pages) Freescale Semiconductor, Inc – Distributed System Interface (DSI) Sensor Interface

FUNCTIONAL DEVICE OPERATION
DSI COMMANDS AND RESPONSES
addressable device and would be immune to any inadvertent
future NVM programming sequences.
Reads and writes are long-word commands only. The
command format is found in Table 21.
Table 21. Read/Write NVM Command Format
Data
Address
Command
CRC
1 1 1 1 PA3 PA2 PA1 PA0 A3 A2 A1 A0 1 0 0 1 X3 X2 X1 X0
Legend
A[3:0] = Address bits. These bits are the address of the device PA[3:0] = Program Address bits. These bits are the address that is to be
previously sent with the Initialization command. They must match programmed into the slave.
the address in the PA[3:0] field and the address stored in the
device address register.
X[3:0] = Cyclic Redundancy Check (CRC). The CRC as calculated by the
master.
READ/WRITE NVM RESPONSE
This response message is sent during the next message
following a valid Read/Write NVM command to the addressed
device. The response format is found in Table 22. The high
byte is omitted during the short-word response. No response
is generated if the command address field was $0.
Table 22. Read/Write NVM Response Format
High Byte
A3 A2 A1 A0 0 0 0 0 1 1
Legend
A[3:0] = Address bits. The slave address.
PA[3:0] = Programmed Address bits. The address that was
programmed into the NVM address bits of the slave.
Low Byte
CRC
1 1 PA3 PA2 PA1 PA0 X3 X2 X1 X0
X[3:0] = Cyclic Redundancy Check (CRC). The CRC as calculated by the
slave.
CLEAR LOGIC OUT COMMAND
The Clear Logic Out command sets the Logic Out pin to a
logic low. The compliment to this command is the Set Logic
Out. The Logic Out is also cleared at power-up or following a
Clear command. The format of the Clear Logic Out command
is shown in Table 23.
Table 23. Clear Logic Out Command Format
Data
Address
Command
CRC
–
–
–
–
–
–
–
–- A3
Legend
A[3:0] = Address bits. The address of the selected device.
A2 A1 A0 1
1
0
0 X3 X2 X1 X0
X[3:0] = Cyclic Redundancy Check (CRC). The CRC as calculated by the
master.
CLEAR LOGIC OUT RESPONSE
This response message is sent during the next message
following a valid Clear Logic Out command to the addressed
device. The response is shown in Table 24. No response is
generated if the command address field was $0.
Table 24. Clear Logic Out Response Format
High Byte
Low Byte
CRC
A3 A2 A1 A0 0 0 0 0 NV
Legend
A[3:0] = Address bits. The slave address.
BS = Bus Switch Position (1=closed).
LO = Logic out driven level.
IO[3:0] = Values at logic I/Os.
U
LO BS IO3 IO2 IO1 IO0 X3 X2 X1 X0
NV = Nonvolatile Memory Write. The value of the NV bit in the slave.
U = Undervoltage indicated true by a “1”.
X[3:0] = Cyclic Redundancy Check (CRC). The CRC as calculated by the
slave.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33793
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