MFR4300_07 Datasheet, PDF (187/266 Pages) Freescale Semiconductor, Inc – FlexRay Communication Controllers

FlexRay Module (FLEXRAYV2)
3.4.12.1 Sync Frame ID Table Content
The Sync Frame ID Table is a snapshot of the protocol related variables vsSyncIdListA and vsSyncIdListB
for each even and odd communication cycle. This table provides a list of the frame IDs of the
synchronization frames received on the corresponding channel and cycle that are used for the clock
synchronization.
3.4.12.2 Sync Frame Deviation Table Content
The Sync Frame Deviation Table is a snapshot of the protocol related variable zsDev(id)(oe)(ch)!Value.
Each Sync Frame Deviation Table entry provides the deviation value for the sync frame, with the frame
ID presented in the corresponding entry in the Sync Frame ID Table.
SFCNTR
SFEVA
SFEVB
SFCNTR
SFODA
SFODB
SFTOR
SFTOR + 60
SFTOR +120
SFTOR + 180
Offset + $00
Offset + $02
Offset + $04
Offset + $06
Offset + $08
Offset + $0A
Offset + $0C
Offset + $0E
Offset + $10
Offset + $12
Offset + $14
Offset + $16
Offset + $18
Offset + $1A
Offset + $1C
Offset + $1E
Offset + $20
Offset + $22
Offset + $24
Offset + $26
Offset + $28
Offset + $2A
Offset + $2C
Offset + $2E
Offset + $30
Offset + $32
Offset + $34
Offset + $36
Offset + $38
Offset + $3A
EVEN
Sync Frame ID ChA 1
Sync Frame ID ChA 2
Sync Frame ID ChA 3
Sync Frame ID ChA 4
Sync Frame ID ChA 5
Sync Frame ID ChA 6
Sync Frame ID ChA 7
Sync Frame ID ChA 8
Sync Frame ID ChA 9
Sync Frame ID ChA 10
Sync Frame ID ChA 11
Sync Frame ID ChA 12
Sync Frame ID ChA 13
Sync Frame ID ChA 14
Sync Frame ID ChA 15
Sync Frame ID ChB 1
Sync Frame ID ChB 2
Sync Frame ID ChB 3
Sync Frame ID ChB 4
Sync Frame ID ChB 5
Sync Frame ID ChB 6
Sync Frame ID ChB 7
Sync Frame ID ChB 8
Sync Frame ID ChB 9
Sync Frame ID ChB 10
Sync Frame ID ChB 11
Sync Frame ID ChB 12
Sync Frame ID ChB 13
Sync Frame ID ChB 14
Sync Frame ID ChB 15
ODD
Sync Frame ID ChA 1
Sync Frame ID ChA 2
Sync Frame ID ChA 3
Sync Frame ID ChA 4
Sync Frame ID ChA 5
Sync Frame ID ChA 6
Sync Frame ID ChA 7
Sync Frame ID ChA 8
Sync Frame ID ChA 9
Sync Frame ID ChA 10
Sync Frame ID ChA 11
Sync Frame ID ChA 12
Sync Frame ID ChA 13
Sync Frame ID ChA 14
Sync Frame ID ChA 15
Sync Frame ID ChB 1
Sync Frame ID ChB 2
Sync Frame ID ChB 3
Sync Frame ID ChB 4
Sync Frame ID ChB 5
Sync Frame ID ChB 6
Sync Frame ID ChB 7
Sync Frame ID ChB 8
Sync Frame ID ChB 9
Sync Frame ID ChB 10
Sync Frame ID ChB 11
Sync Frame ID ChB 12
Sync Frame ID ChB 13
Sync Frame ID ChB 14
Sync Frame ID ChB 15
EVEN
Sync Deviation ChA 1
Sync Deviation ChA 2
Sync Deviation ChA 3
Sync Deviation ChA 4
Sync Deviation ChA 5
Sync Deviation ChA 6
Sync Deviation ChA 7
Sync Deviation ChA 8
Sync Deviation ChA 9
Sync Deviation ChA 10
Sync Deviation ChA 11
Sync Deviation ChA 12
Sync Deviation ChA 13
Sync Deviation ChA 14
Sync Deviation ChA 15
Sync Deviation ChB 1
Sync Deviation ChB 2
Sync Deviation ChB 3
Sync Deviation ChB 4
Sync Deviation ChB 5
Sync Deviation ChB 6
Sync Deviation ChB 7
Sync Deviation ChB 8
Sync Deviation ChB 9
Sync Deviation ChB 10
Sync Deviation ChB 11
Sync Deviation ChB 12
Sync Deviation ChB 13
Sync Deviation ChB 14
Sync Deviation ChB 15
ODD
Sync Deviation ChA 1
Sync Deviation ChA 2
Sync Deviation ChA 3
Sync Deviation ChA 4
Sync Deviation ChA 5
Sync Deviation ChA 6
Sync Deviation ChA 7
Sync Deviation ChA 8
Sync Deviation ChA 9
Sync Deviation ChA 10
Sync Deviation ChA 11
Sync Deviation ChA 12
Sync Deviation ChA 13
Sync Deviation ChA 14
Sync Deviation ChA 15
Sync Deviation ChB 1
Sync Deviation ChB 2
Sync Deviation ChB 3
Sync Deviation ChB 4
Sync Deviation ChB 5
Sync Deviation ChB 6
Sync Deviation ChB 7
Sync Deviation ChB 8
Sync Deviation ChB 9
Sync Deviation ChB 10
Sync Deviation ChB 11
Sync Deviation ChB 12
Sync Deviation ChB 13
Sync Deviation ChB 14
Sync Deviation ChB 15
Figure 3-135. Sync Table Memory Layout
3.4.12.3 Sync Frame ID and Sync Frame Deviation Table Setup
The FlexRay module writes a copy of the internal synchronization frame ID and deviation tables into the
FRM if requested by the application. The application must provide the appropriate amount of FRM for the
tables. The memory layout of the tables is given in Figure 3-135. Each table occupies 120 16-bit entries.
While the protocol is in POC:config state, the application must program the offsets for the tables into the
Sync Frame Table Offset Register (SFTOR).
MFR4300 Data Sheet, Rev. 3
Freescale Semiconductor
187