56F8346_07 Datasheet, PDF (167/178 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

56F8346 Package and Pin-Out Information
Part 11 Packaging
11.1 56F8346 Package and Pin-Out Information
This section contains package and pin-out information for the 56F8346. This device comes in a 144-pin
Low-profile Quad Flat Pack (LQFP). Figure 11-1 shows the package outline for the LQFP; Figure 11-3
shows the mechanical parameters for this package, and Table 11-1 lists the pin-out for the 144-pin LQFP.
V_{DD_IO}
V_PP2
CLKO
TXD0
RXD0
PHASEA1
PHASEB1
INDEX1
HOME1
A1
A2
A3
A4
A5
V_CAP4
V_{DD_IO}
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
V_SS
D7
D8
D9
V_{DD_IO}
D10
GPIOB0
PWMB0
PWMB1
PWMB2
Orientation Mark
Pin 1
37
109
73
ANB4
ANB3
ANB2
ANB1
ANB0
V_{SSA_ADC}
V_{DDA_ADC}
V_REFH
V_REFP
V_REFMID
V_REFN
V_REFLO
Temp_Sense
ANA7
ANA6
ANA5
ANA4
ANA3
ANA2
ANA1
ANA0
CLKMODE
RESET
RSTO
V_{DD_IO}
V_CAP3
EXTAL
XTAL
V_{DDA_OSC_PLL}
OCR_DIS
D6
D5
D4
D3
FAULTA2
FAULTA1
Figure 11-1 Top View, 56F8346 144-Pin LQFP Package
56F8346 Technical Data, Rev. 15
Freescale Semiconductor
167
Preliminary