10XSC425 Datasheet, PDF (16/56 Pages) Freescale Semiconductor, Inc – Quad High Side Switch

Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions 6.0 V V_PWR  20 V, 3.0 V  V_DD  5.5 V, -40 C  T_A  125 C, GND = 0 V, unless
otherwise noted. Typical values noted reflect the approximate parameter means at T_A = 25 °C under nominal conditions, unless
otherwise noted.
Symbol
Characteristic
Min
Typ
Max
Unit Notes
OUTPUTS HS0 TO HS3 (CONTINUED)
C_{SR0_x_ACC}
HS[2,3] Current Sense Ratio (C_SR0) Accuracy (6.0 V < V_HS[2:3] < 20 V) 
with 28W bit = x
%
At 25 C and 125 C
• I_HS[2:3] = 6.25 A
• I_HS[2:3] = 2.5 A
-18
–
18
-21
–
21
• I_HS[2:3] = 1.5 A
• I_HS[2:3] = 0.75 A
-22
–
22
-25
–
25
At -40 C
• I_HS[2:3] = 6.25 A
• I_HS[2:3] = 2.5 A
• I_HS[2:3] = 1.5 A
• I_HS[2:3] = 0.75 A
-23
–
23
-26
–
26
-30
–
30
-35
–
35
C_{SR0_x_ACC}
(CAL)
HS[2,3] Current Recopy Accuracy with one calibration point 
(6.0 V < V_HS[2:3] < 20 V)
• I_HS[2:3] = 2.5 A
%
(20)
-5.0
–
5.0
(C_{SR0_x})/
(T)
HS[2,3] C_SR0 Current Recopy Temperature Drift (6.0 V < V_HS[2:3] < 20 V)
with 28W bit = 0
• I_HS[2:3] = 2.5 A
–
%/C ⁽²⁰⁾
–
0.04
C_{SR1_x_ACC} ^{HS[2,3] Current Sense Ratio (C}SR1^{) Accuracy (6.0 V < V}HS[2:3] ^{< 20 V)}
%
At 25 C and 125 C
• I_HS[2:3] = 6.25 A
• I_HS[2:3] = 18.75 A
At -40 C
-22
–
+22
-25
–
+25
• I_HS[2:3] = 6.25 A
• I_HS[2:3] = 18.75 A
-25
–
+25
-27
–
+27
C_{SR1_x_ACC}
(CAL)
HS[2,3] Current Recopy Accuracy with one calibration point 
(6.0 V < V_HS[2:3] < 20 V)
• I_HS[2:3] = 6.2 A
%
(20)
-5.0
–
5.0
CONTROL INTERFACE
V_IH
V_IL
I_DWN
I_UP
C_SO
Input Logic High-voltage
Input Logic Low-voltage
Input Logic Pull-down Current (SCLK, SI)
Input Logic Pull-up Current (CSB)
SO, FSB Tri-state Capacitance
2.0
–
V_DD+0.3
V
(21)
-0.3
–
0.8
V
(21)
5.0
–
20
A
(22)
5.0
–
20
A
(23)
–
–
20
pF
(24)
Notes
20. Based on statistical analysis. It is not production tested.
21. Upper and lower logic threshold voltage range applies to SI, CSB, SCLK, RSTB, IN[0:3], and WAKE input signals. The WAKE and RSTB
signals may be supplied by a derived voltage referenced to V_PWR.
22. Pull-down current is with V_SI > 1.0 V and V_SCLK > 1.0 V.
23. Pull-up current is with V_CSB < 2.0 V. CSB has an active internal pull-up to V_DD.
24. Input capacitance of SI, CSB, SCLK, RSTB, IN[0:3], and WAKE. This parameter is guaranteed by process monitoring but is not
production tested.
10XSC425
16
Analog Integrated Circuit Device Data
Freescale Semiconductor