MC9S08LL16_10 Datasheet, PDF (14/44 Pages) Freescale Semiconductor, Inc – MC9S08LL16 Series

Electrical Characteristics
Table 8. DC Characteristics (continued)
Num C
Characteristic
Symbol
Condition
Min
Typ¹
Max Unit
Hi-Z (off-state)
12 P leakage
current
all input/output
(per pin) |I_OZ|
V_In = V_DD or V_SS
—
0.025
1
A
13
P
Total leakage
current³
Total leakage current for all
pins
|I_InT|
V_In = V_DD or V_SS
—
—
2
A
P ^Pullup,
14
pulldown
resistors when
P _enabled
PTA[0:3], PTA[6:7],
PTB[0:7], PTC[0:7]
PTA[4:5], PTD[0:7],
PTE[0:7]
R_PU,
R_PD
—
52.5
17.5
—
k
69.5
Single pin limit
–0.2
—
15
D
DC injection
current ^{4, 5, 6}
Total MCU limit, includes
sum of all stressed pins
I_IC V_IN < V_SS, V_IN > V_DD
–5
—
0.2
mA
5
mA
16 C Input capacitance, all pins
C_In
—
—
8
pF
17 C RAM retention voltage
18 C POR re-arm voltage⁷
V_RAM
V_POR
—
0.6
1.0
V
0.9
1.4
2.0
V
19 D POR re-arm time
t_POR
10
—
—
s
20 P Low-voltage detection threshold
V_LVD
V_DD falling
V_DD rising
1.80
1.88
1.84
1.88
1.92
1.96
V
21 P Low-voltage warning threshold
V_LVW
V_DD falling
V_DD rising
2.08
2.14
2.2
V
22 P Low-voltage inhibit reset/recover hysteresis V_hys
23 P Bandgap voltage reference⁸
V_BG
—
80
—
mV
1.15
1.17
1.18
V
1 _{Typical values are measured at 25 C. Characterized, not tested}
2 _{All I/O pins except for LCD pins in open drain mode.}
3 _{Total leakage current is the sum value for all GPIO pins. This leakage current is not distributed evenly across all pins but}
characterization data shows that individual pin leakage current maximums are less than 250 nA.
4 _{All functional non-supply pins, except for PTB2 are internally clamped to VSS and VDD.}
5 _{Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate}
resistance values for positive and negative clamp voltages, then use the larger of the two values.
6 _{Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current}
conditions. If the positive injection current (V_In > V_DD) is greater than I_DD, the injection current may flow out of V_DD and could
result in external power supply going out of regulation. Ensure that external V_DD load will shunt current greater than maximum
injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is
present, or if clock rate is very low (which would reduce overall power consumption).
7 _{POR will occur below the minimum voltage.}
8 _{Factory trimmed at VDD = 3.0 V, Temp = 25 C.}
MC9S08LL16 Series MCU Data Sheet, Rev. 6
14
Freescale Semiconductor