33993 Datasheet, PDF (12/28 Pages) Freescale Semiconductor, Inc – Multiple Switch Detection Interface

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
OPERATIONAL MODES
POWER SUPPLY
The 33993 is designed to operate from 5.5 V to 40 V on
the VPWR pin. Characteristics are provided from 8.0 V to
16 V for the device. Switch contact currents and the internal
logic supply are generated from the VPWR pin. The VDD
supply pin is used to set the SPI communication voltage
levels, current source for the SO driver, and pull-up current
on INT and CS.
The VDD supply may be removed from the device to
reduce quiescent current. If V_DD is removed while the device
is in Normal mode, the device will remain in Normal mode. If
V_DD is removed in Sleep mode, the device will remain in
Sleep mode until wake-up input is received (WAKE high to
low, switch input or interrupt timer expires).
Removing V_DD from the device disables SPI
communication and will not allow the device to wake up from
INT and CS pins.
POWER-ON RESET (POR)
Applying V_PWR to the device will cause a Power-ON Reset
and place the device in Normal mode.
Default settings from Power-ON Reset via V_PWR or Reset
Command are as follows:
• Programmable Switch – Set to Switch to Battery
• All Inputs Set as Wake-Up
• Wetting Current On (16 mA)
• Wetting Current Timer On (20 ms)
• All Inputs Tri-State
• Analog Select 00000 (No Input Channel Selected)
MODES OF OPERATION
The 33993 has two operating modes, Normal mode and
Sleep mode. A discussion on Normal mode begins below.
A discussion on Sleep mode begins on page 17.
NORMAL MODE
Normal mode may be entered by the following events:
• Application of V_PWR to the IC
• Change-of-Switch State (when enabled)
• Falling Edge of WAKE
• Falling Edge of INT (with V_DD = 5.0 V and WAKE at
Logic [1])
• Falling Edge of CS (with V_DD = 5.0 V)
• Interrupt Timer Expires
Only in Normal mode with V_DD applied can the registers of
the 33993 be programmed through the SPI.
The registers that may be programmed in Normal mode
are listed below. Further explanation of each register is
provided in subsequent paragraphs.
• Programmable Switch Register (Settings Command)
• Wake-Up/Interrupt Register (Wake-Up/Interrupt
Command )
• Wetting Current Register (Metallic Command)
• Wetting Current Timer Register (Wetting Current Timer
Enable Command )
• Tri-State Register (Tri-State Command)
• Analog Select Register (Analog Command)
• Calibration of Timers (Calibration Command)
• Reset (Reset Command)
Figure 6 is a graphical description of the device operation
in Normal mode. Switch states are latched into the input
register on the falling edge of CS. The INT to the MCU is
cleared on the rising edge of CS. However, INT will not clear
on rising edge of CS if a switch has closed during SPI
communication (CS low). This prevents switch states from
being missed by the MCU.
33993
12
Analog Integrated Circuit Device Data
Freescale Semiconductor