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MSC8103 Datasheet, PDF (1/104 Pages) Freescale Semiconductor, Inc – Network Digital Signal Processor
Freescale Semiconductor
Technical Data
MSC8103
Rev. 11, 8/2005
MSC8103
Network Digital Signal Processor
CPM
UTOPIA
Interface
MII
3 × FCC
2 × MCC
4 × SCC
Interrupt
Controller
Timers
Parallel I/O
Baud Rate
Generators
{•
TDMs •
•
2 × SMC
SPI
Dual Ported
RAM
2 × SDMA
Other
Peripherals
I2C
RISC
Extended Core
Program
Sequencer
Address
Register
File
Data ALU
Register
File
SC140
Core
Address
ALU
Data
ALU
JTAG
EOnCE™
Power
Management
Clock/PLL
SIU
64-bit System Bus
MEMC
DMA
Engine
PIT
System Protection
Reset Control
Clock Control
64/32-bit
System
Bus
Bridge
SIC_EXT
SIC
Interrupts
The Freescale MSC8103
16-bit DSP is a member of
the family of DSPs based
on the StarCore SC140
DSP core. The MSC8103
is available in two core
speed levels: 275 and 300
MHz.
MEMC
64-bit Local Bus
Q2PPC 128-bit QBus
PIC
Bridge
Boot
ROM
SRAM
512 KB
HDI16
L1 Interface
Interrupts
8/16-bit
Host
Interface
128-bit P-Bus
64-bit XA Data Bus
64-bit XB Data Bus
What’s New?
Rev. 11 includes the following
changes:
• Features list on page iii
updates package
description.
• Table 2-3 updates junction-
to-case value.
• Section 3.1 adds a note to
include the lead-free
packaging.
• Ordering Information on the
back page adds lead-free
part numbers.
Figure 1. MSC8103 Block Diagram
The Freescale MSC8103 DSP is a very versatile device that integrates the high-performance SC140 four-ALU
(arithmetic logic unit) DSP core along with 512 KB of internal memory, a communications processor module
(CPM), a 64-bit bus, a very flexible system integration unit (SIU), and a 16-channel DMA engine on a single
device. With its four-ALU core, the MSC8103 can execute up to four multiply-accumulate (MAC) operations in a
single clock cycle. The MSC8103 CPM is a 32-bit RISC-based communications protocol engine that can network
to time-division multiplexed (TDM) highways, Ethernet, and asynchronous transfer mode (ATM) backbones. The
MSC8103 60x-compatible bus interface facilitates its connection to multi-master system architectures. The very
large internal memory, 512 KB, reduces the need for external program and data memories. The MSC8103 offers
1200 DSP MMACS performance using an internal 300 MHz clock with a 1.6 V core and independent 3.3 V
input/output (I/O).
© Freescale Semiconductor, Inc., 2001, 2005. All rights reserved.