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MPXV7002_08 Datasheet, PDF (1/10 Pages) Freescale Semiconductor, Inc – Integrated Silicon Pressure Sensor On-Chip Signal Conditioned, Temperature Compensated and Calibrated
Freescale Semiconductor
Technical Data
Integrated Silicon Pressure Sensor
On-Chip Signal Conditioned,
Temperature Compensated and
Calibrated
The MPXV7002 series piezoresistive transducers are state-of-the-art
monolithic silicon pressure sensors designed for a wide range of applications, but
particularly those employing a microcontroller or microprocessor with A/D inputs.
This transducer combines advanced micromachining techniques, thin-film
metallization, and bipolar processing to provide an accurate, high level analog
output signal that is proportional to the applied pressure.
Features
• 2.5% Typical Error over +10°C to +60°C with Auto Zero
• 6.25% Maximum Error over +10°C to +60°C without Auto Zero
• Ideally Suited for Microprocessor or Microcontroller-Based Systems
• Thermoplastic (PPS) Surface Mount Package
• Temperature Compensated over +10° to +60°C
• Patented Silicon Shear Stress Strain Gauge
• Available in Differential and Gauge Configurations
Typical Applications
• Hospital Beds
• HVAC
• Respiratory Systems
• Process Control
ORDERING INFORMATION
Device
Type
Options
Case
No.
MPX Series Packing Device
Order No. Options Marking
Ported Gauge, Axial Port, SMT
Elements
Gauge, Axial Port, SMT
482A
482A
MPXV7002GC6U Rails MPXV7002G
MPXV7002GC6T1 Tape & MPXV7002G
Reel
Gauge, Side Port, SMT 1369 MPXV7002GP
Trays MPXV7002G
Differential, Dual Port,
SMT
1351 MPXV7002DP
Trays MPXV7002DP
Differential, Dual Port,
SMT
1351 MPXV7002DPT1 Tape & MPXV7002DP
Reel
VS
MPXV7002
Rev 1.0, 09/2008
MPXV7002
SERIES
INTEGRATED
PRESSURE SENSOR
-2 to 2 kPa (-0.3 to 0.3 psi)
0.5 to 4.5 V OUTPUT
SMALL OUTLINE PACKAGE
MPXV7002GC6U
CASE 482A-01
MPXV7002GP
CASE 1369-01
MPXV7002DP
CASE 1351-01
SMALL OUTLINE PACKAGE
PIN NUMBERS(1)
1
N/C
5
N/C
2
VS
6
N/C
3
Gnd
7
N/C
4
Vout
8
N/C
1. Pins 1, 5, 6, 7, and 8 are internal device
connections. Do not connect to external
circuitry or ground. Pin 1 is noted by the
notch in the lead.
Sensing
Element
Thin Film
Temperature
Compensation
and
Gain Stage #1
Gain Stage #2
and
Ground
Vout
Reference
Shift Circuitry
Pins 1 and 5 through 8 are NO CONNECTS
GND
for surface mount package
Figure 1. Fully Integrated Pressure Sensor Schematic
© Freescale Semiconductor, Inc., 2005, 2008. All rights reserved.