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MC9S08QE128 Datasheet, PDF (1/52 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit | |||
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Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MC9S08QE128
Rev. 3, 06/2007
MC9S08QE128 Series
Covers: MC9S08QE128, MC9S08QE96, MC9S08QE64
⢠8-Bit HCS08 Central Processor Unit (CPU)
â Up to 50.33-MHz HCS08 CPU from 3.6V to 2.1V, and
20-MHz CPU at 2.1V to 1.8V across temperature range
â HC08 instruction set with added BGND instruction
â Support for up to 32 interrupt/reset sources
⢠On-Chip Memory
â Flash read/program/erase over full operating voltage and
temperature
â Random-access memory (RAM)
â Security circuitry to prevent unauthorized access to
RAM and ï¬ash contents
⢠Power-Saving Modes
â Two low power stop modes; reduced power wait mode
â Peripheral clock enable register can disable clocks to
unused modules, reducing currents; allows clocks to
remain enabled to speciï¬c peripherals in stop3 mode
â Very low power external oscillator can be used in stop3
mode to provide accurate clock to active peripherals
â Very low power real time counter for use in run, wait,
and stop modes with internal and external clock sources
â 6 μs typical wake up time from stop modes
⢠Clock Source Options
â Oscillator (XOSC) â Loop-control Pierce oscillator;
Crystal or ceramic resonator range of 31.25 kHz to
38.4 kHz or 1 MHz to 16 MHz
â Internal Clock Source (ICS) â FLL controlled by
internal or external reference; precision trimming of
internal reference allows 0.2% resolution and 2%
deviation; supports CPU freq. from 2 to 50.33 MHz
⢠System Protection
â Watchdog computer operating properly (COP) reset
with option to run from dedicated 1-kHz internal clock
source or bus clock
â Low-voltage detection with reset or interrupt; selectable
trip points
â Illegal opcode detection with reset
â Flash block protection
⢠Development Support
â Single-wire background debug interface
â Breakpoint capability to allow single breakpoint setting
during in-circuit debugging (plus two more breakpoints)
â On-chip in-circuit emulator (ICE) debug module
containing two comparators and nine trigger modes.
MC9S08QE128
80-LQFP
Case 917A
14 mm2
48-QFN
Case 1314
7 mm2
64-LQFP
Case 840F
10 mm2
44-QFP
Case 824A
10 mm2
32-LQFP
Case 873A
7 mm2
Eight deep FIFO for storing change-of-ï¬ow addresses
and event-only data. Debug module supports both tag
and force breakpoints.
⢠ADC â 24-channel, 12-bit resolution; 2.5 μs conversion
time; automatic compare function; 1.7 mV/°C temperature
sensor; internal bandgap reference channel; operation in
stop3; fully functional from 3.6V to 1.8V
⢠ACMPx â Two analog comparators with selectable
interrupt on rising, falling, or either edge of comparator
output; compare option to ï¬xed internal bandgap reference
voltage; outputs can be optionally routed to TPM module;
operation in stop3
⢠SCIx â Two SCIs with full duplex non-return to zero
(NRZ); LIN master extended break generation; LIN slave
extended break detection; wake up on active edge
⢠SPIxâ Two serial peripheral interfaces with Full-duplex or
single-wire bidirectional; Double-buffered transmit and
receive; MSB-ï¬rst or LSB-ï¬rst shifting
⢠IICx â Two IICs with; Up to 100 kbps with maximum bus
loading; Multi-master operation; Programmable slave
address; Interrupt driven byte-by-byte data transfer;
supports broadcast mode and 10 bit addressing
⢠TPMx â One 6-channel and two 3-channel; Selectable
input capture, output compare, or buffered edge- or
center-aligned PWMs on each channel
⢠RTC â 8-bit modulus counter with binary or decimal
based prescaler; External clock source for precise time
base, time-of-day, calendar or task scheduling functions;
Free running on-chip low power oscillator (1 kHz) for
cyclic wake-up without external components
⢠Input/Output
â 70 GPIOs and 1 input-only and 1 output-only pin
â 16 KBI interrupts with selectable polarity
â Hysteresis and conï¬gurable pull-up device on all input
pins; Conï¬gurable slew rate and drive strength on all
output pins.
â SET/CLR registers on 16 pins (PTC and PTE)
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
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