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ESD9FN24 Datasheet, PDF (3/7 Pages) Formosa MS – Chip Transient Voltage Suppressor For ESD Protection
Chip Transient Voltage Suppressor For ESD Protection
ESD9FN24
Typical characteristics (at TA=25oC unless otherwise noted)
I
IF
Formosa MS
V V V C BR RWM
IR VF
V
IT
IPP
Uni-Directional TVS
VC : Clamping Voltage @ IPP
IPP : Maximum Reverse Peak Pulse Current
VRWM : Maximum Reverse Working voltage
IR : Maximum Reverse Leakage Current @VRWM
VBR : Breakdown voltage @IT
IT : Test Current
PPP : Peak Pulse Power
IF : Forward Current
VF : Forward Voltage @ IF
CJ : Max. Junction Capacitance @VR = 0V and f = 1MHz
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Page 3
Document ID
DS-121813
Issued Date
2015/12/11
Revised Date
-
Revision
A
Page.
7