LP3000SOT89 Datasheet, PDF (1/3 Pages) Filtronic Compound Semiconductors – LOW NOISE, HIGH LINEARITY PACKAGED PHEMT

LP3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
• FEATURES
♦ 29 dBm Output Power at 1-dB Compression at 1.8 GHz
♦ 15 dB Power Gain at 1.8 GHz
♦ 1.3 dB Noise Figure
♦ 46 dBm Output IP3 at 1.8 GHz
♦ 55% Power-Added Efficiency
• DESCRIPTION AND APPLICATIONS
The LP3000SOT89 is a packaged Aluminum Gallium Arsenide / Indium Gallium Arsenide
(AlGaAs/InGaAs) pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a
0.25 µm x 3000 µm Schottky barrier gate, defined by electron-beam photolithography. The recessed
“mushroom” gate structure minimizes parasitic gate-source and gate resistance. The epitaxial
structure and processing have been optimized for reliable high-power applications. The LP3000 also
features Si3N4 passivation and is available in die form or in other packages.
Typical applications include PCS/Cellular low-voltage, high-efficiency amplifiers.
• ELECTRICAL SPECIFICATIONS @ T_Ambient = 25°C
Parameter
Saturated Drain-Source Current
LP3000SOT89-1
Symbol
I_DSS
Test Conditions
V_DS = 2 V; V_GS = 0 V
LP3000SOT89-2
LP3000SOT89-3
Power at 1-dB Compression
Power Gain at 1-dB Compression
Power-Added Efficiency
P-1dB
G-1dB
PAE
Noise Figure
NF
Output Third-Order Intercept Point IP3
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
Pinch-Off Voltage
Gate-Source Breakdown
Voltage Magnitude
Gate-Drain Breakdown
Voltage Magnitude
frequency=1.8 GHz
I_MAX
G_M
I_GSO
V_P
|V_BDGS|
|V_BDGD|
V_DS = 5 V; I_DS = 50% I_DSS
V_DS = 5 V; I_DS = 50% I_DSS
V_DS = 5 V; I_DS = 50% I_DSS;
P_IN = 15 dBm
V_DS = 5 V; I_DS = 50% I_DSS
V_DS = 5V; I_DS = 50% I_DSS;
P_IN = 3 dBm
V_DS = 2 V; V_GS = 1 V
V_DS = 2 V; V_GS = 0 V
V_GS = -5 V
V_DS = 2 V; I_DS = 15 mA
I_GS = 15 mA
I_GD = 15 mA
Min Typ Max Units
800 860 924 mA
925 975 1024 mA
1025 1060 1100 mA
28 29
dBm
14 15
dB
55
%
1.3
dB
46
dBm
1700
mA
700 900
mS
15 200 µA
-0.25 -1.2 -2.0 V
-10 -12
V
-10 -13
V
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Revised: 1/16/02
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