FAN4860 Datasheet, PDF (9/15 Pages) Fairchild Semiconductor – 3MHz, 5V Output Synchronous TinyBoost™ Regulator

Functional Description
Circuit Description
FAN4860 is a synchronous boost regulator, typically operating
at 3MHz in continuous conduction mode (CCM), which occurs
at moderate to heavy load current and low VIN voltages.
At light-load currents, the converter switches automatically to
power-saving PFM mode. The regulator automatically and
smoothly transitions between quasi-fixed-frequency
continuous conduction PWM mode and variable-frequency
PFM mode to maintain the highest possible efficiency over
the full range of load current and input voltage.
PWM Mode Regulation
The FAN4860 uses a minimum on-time and computed
minimum off-time to regulate VOUT. The regulator achieves
excellent transient response by employing current mode
modulation. This technique causes the regulator output to
exhibit a load line. During PWM mode, the output voltage
drops slightly as the input current rises. With a constant VIN,
this appears as a constant output resistance.
The “droop” caused by the output resistance when a load is
applied allows the regulator to respond smoothly to load
transients with negligible overshoot.
Figure 26 Output Resistance (ROUT)
VOUT as a function of ILOAD can be computed when the
regulator is in PWM mode (continuous conduction) as:
V_OUT = 5.05 − R_OUT • I_LOAD
EQ. 1
For example, at VIN=3.3V, and ILOAD=200mA, VOUT would
drop to:
V_OUT = 5.05 − 0.38 • 0.2 = 4.974V
EQ. 1A
At VIN=2.3V, and ILOAD=200mA, VOUT would drop to:
V_OUT = 5.05 − 0.68 • 0.2 = 4.914V
EQ. 1B
PFM Mode
If VOUT > VREF when the minimum off-time has ended, the
regulator enters PFM mode. Boost pulses are inhibited until
VOUT < VREF. The minimum on-time is increased to enable
the output to pump up sufficiently with each PFM boost
pulse. Therefore, the regulator behaves like a constant on-
time regulator, with the bottom of its output voltage ripple at
5.05V in PFM mode.
Table 1. Operating States
Mode
Description
Invoked When:
LIN
Linear Startup
SS
Boost Soft-Start
BST Boost Operating Mode
VIN > VOUT
VOUT < VREG
VOUT=VREG
Shutdown and Startup
If EN is LOW, all bias circuits are off and the regulator is in
shutdown mode. During shutdown, true load disconnect
between battery and load prevents current flow from VIN to
VOUT, as well as reverse flow from VOUT to VIN.
LIN State
When EN rises, if VIN > UVLO, the regulator first attempts to
bring VOUT within about 1V of VIN by using the internal fixed
current source from VIN (ILIN1). The current is limited to about
630mA during LIN1 mode.
If VOUT reaches VIN-1V during LIN1 mode, the SS state is
initiated. Otherwise, LIN1 times out after 16 CLK counts and
the LIN2 mode is entered.
In LIN2 mode, the current source is incremented to 850mA.
If VOUT fails to reach VIN-1V after 64 CLK counts, a fault
condition is declared.
SS State
Upon the successful completion of the LIN state (VOUT>VIN-
1V), the regulator begins switching with boost pulses current
limited to about 50% of nominal level, incrementing to full
scale over a period of 32 CLK counts.
If the output fails to achieve 90% of its setpoint within 96 CLK
counts at full-scale current limit, a fault condition is declared.
BST State
This is the normal operating mode of the regulator. The
regulator uses a minimum tOFF-minimum tON modulation
V_IN
scheme. Minimum tOFF is proportional to ^VOUT , which keeps
the regulator’s switching frequency reasonably constant in
CCM. tON(MIN) is proportional to VIN and is higher if the inductor
current reaches 0 before tOFF(MIN) during the prior cycle.
© 2009 Fairchild Semiconductor Corporation
FAN4860 • Rev. 1.0.3
9
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