FAN4860 Datasheet, PDF (12/15 Pages) Fairchild Semiconductor – 3MHz, 5V Output Synchronous TinyBoost™ Regulator

regulation and continually attempt soft-start, only to have
COUT discharged by the load when in the FAULT state.
The circuit can start with higher values of COUT under full
load if VIN is higher, since:
I_OUT
=
⎜⎝⎛ I_{LIM(PK )}
−
I_RIPPLE
2
⎟⎞ •
⎠
V_IN
V_OUT
EQ. 6
Generally, the limitation occurs in BST mode.
The FAN4860 starts on the first pass (without triggering a
FAULT) under the following conditions for CEFF(MAX):
Table 4. Maximum C_EFF for First-Pass Startup
Operating Conditions
V_IN (V)
R_LOAD(MIN)
C_EFF(MAX) (μF)
2.3 to 4.5
25Ω
10
2.7 to 4.5
25Ω
15
2.7 to 4.5
33Ω
22
COUT2 may be necessary to preserve load transient response
when the Schottky is used. When a load is applied at the FB
pin, the forward voltage of the D1 rapidly increases before
the regulator can respond or the inductor current can
change. This causes an immediate drop of up to 300mV,
depending on D1’s characteristics if COUT2 is absent. COUT2
supplies instantaneous current to the load while the regulator
adjusts the inductor current. A value of at least half of the
minimum value of COUT should be used for COUT2. COUT2
needs to withstand the maximum voltage at the FB pin as
the TVS is clamping.
The maximum DC output current available is reduced with
this circuit, due to the additional dissipation of D1.
Layout Guideline
CEFF values shown in Table 4 typically apply to the lowest
VIN. The presence of higher VIN enhances ability to start into
larger CEFF at full load.
Transient Protection
To protect against external voltage transients caused by
ESD discharge events, or improper external connections,
some applications employ an external transient voltage
suppressor (TVS) and Schottky diode (D1 in Figure 31).
Figure 32 WLCSP Suggested Layout (Top View)
Figure 31 FAN4860 with External Transient Protection
The TVS is designed to clamp the FB line (system VOUT) to
+10V or –2V during external transient events. The Schottky
diode protects the output devices from the positive
excursion. The FB pin can tolerate up to 14V of positive
excursion, while both the FB and VOUT pins can tolerate
negative voltages.
The FAN4860 includes a circuit to detect a missing or
defective D1 by comparing VOUT to FB. If VOUT – FB > about
0.7V, the IC shuts down. The IC remains shut down until
VOUT < UVLO and VIN < UVLO+0.7 or EN is toggled.
Figure 33 UMLP Suggested Layout (Top View)
© 2009 Fairchild Semiconductor Corporation
FAN4860 • Rev. 1.0.3
12
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