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FAN4810 Datasheet, PDF (9/14 Pages) Fairchild Semiconductor – Power Factor Correction Controller | |||
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PRODUCT SPECIFICATION
FAN4810
Error Ampliï¬er Compensation
The output of the PFC is typically loaded by a PWM
converter to produce the low voltages and high currents
required at the outputs of a SMPS. PWM loading of the
PFC can be modeled as a negative resistor; an increase in
input voltage to the PWM causes a decrease in the input
current. This response dictates the proper compensation of
the two transconductance error ampliï¬ers. Figure 2 shows
the types of compensation networks most commonly used
for the voltage and current error ampliï¬ers, along with their
respective return points. The current loop compensation is
returned to VREF to produce a soft-start characteristic on the
PFC: as the reference voltage comes up from zero volts, it
creates a differentiated voltage on IEAO which prevents the
PFC from immediately demanding a full duty cycle on its
boost converter. There are two major concerns when
compensating the voltage loop error ampliï¬er; stability and
transient response. Optimizing interaction between transient
response and stability requires that the error ampliï¬erâs
open-loop crossover frequency should be 1/2 that of the line
frequency, or 23Hz for a 47Hz line (lowest anticipated
international power frequency). The gain vs. input voltage
of the FAN4810âs voltage error ampliï¬er has a specially
shaped non-linearity such that under steady-state operating
conditions the transconductance of the error ampliï¬er is at a
local minimum. Rapid perturbations in line or load condi-
tions will cause the input to the voltage error ampliï¬er (VFB)
to deviate from its 2.5V (nominal) value. If this happens,
thetransconductance of the voltage error ampliï¬er will
increase signiï¬cantly, as shown in the Typical Performance
Characteristics. This raises the gain-bandwidth product of
the voltage loop, resulting in a much more rapid voltage loop
response to such perturbations than would occur with a
conventional linear gain characteristic.
The current ampliï¬er compensation is similar to that of the
voltage error ampliï¬er with the exception of the choice of
crossover frequency. The crossover frequency of the current
ampliï¬er should be at least 10 times that of the voltage
ampliï¬er,to prevent interaction with the voltage loop.
It should also be limited to less than 1/6th that of the
switching frequency, e.g. 16.7kHz for a 100kHz switching
frequency.
There is a modest degree of gain contouring applied to the
transfer characteristic of the current error ampliï¬er, to
increase its speed of response to current-loop perturbations.
However, the boost inductor will usually be the dominant
factor in overall current loop response. Therefore, this
contouring is signiï¬cantly less marked than that of the
voltage error ampliï¬er. This is illustrated in the Typical
Performance Characteristics.
For more information on compensating the current and
voltage control loops, see Application Note AN42045.
Application Note 42030 also contains valuable information
for the design of this class of PFC.
VREF
PFC
OUTPUT
16
VEAO
VFB
15
VEA
â
2.5V +
IAC
2
VRMS
4
ISENSE
3
GAIN
MODULATOR
1
IEAO
IEA
+
+
â
â
Figure 2. Compensation Network Connections for the
Voltage and Current Error Amplifiers
VBIAS
RBIAS
VCC
FAN4810
GND
0.22µF
CERAMIC
15V
ZENER
Figure 3. External Component Connections to VCC
REV. 1.0.12 9/24/03
9
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