74F899 Datasheet, PDF (9/12 Pages) Fairchild Semiconductor – 9-Bit Latchable Transceiver with Parity Generator/Checker

AC Path (Continued)
SEL → BPAR
(SEL → APAR)
FIGURE 10.
LEA → BPAR, B[0:7]
(LEB → APAR, A[0:7])
TS(H), TH(H)
LEA → APAR, A[0:7]
(LEB → BPAR, B[0:7])
FIGURE 11.
FIGURE 12.
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