FXMA2104 Datasheet, PDF (8/15 Pages) Fairchild Semiconductor – Dual-Supply, 4-Bit Voltage Translator / Buffer / Repeater

I²C Bus Isolation
The FXMA2104 supports I²C-Bus^® isolation for the
following conditions:
 Bus isolation if bus clear
 Bus isolation if either V_CC goes to ground
Bus Clear
Because the I²C specification defines the minimum SCL
frequency of DC, the SCL signal can be held LOW
forever; however, this condition shuts down the I²C bus.
The I²C specification refers to this condition as Bus
Clear. In Figure 6, if slave #2 holds down SCL forever,
the master and slave #1 are not able to communicate
because the FXMA2104 passes the SCL stuck-LOW
condition from slave #2 to slave #1 as well as the
master. However, if the OE pin is pulled LOW
(disabled), both ports (A and B) are 3-stated. This
results in the FXMA2104 isolating slave #2 from the
master and slave #1, allowing full communication
between the master and slave #1.
Either V_CC to GND
If slave #2 is a camera that is suddenly removed from
the I²C bus, resulting in V_CCB transitioning from a valid
V_CC (1.65V – 5.5V) to 0V; the FXMA2104 automatically
forces all I/Os on both its A and B ports into 3-state.
Once V_CCB has reached 0V, full I²C communication
between the master and slave #1 remains undisturbed.
V_CC = 1.8V
Slave #1
V_CC = 3.3V
SCL1
SDA1
Master
SCL1
SDA 1
V_CC = 1.8V
SCL 2
SDA 2
SCL 2
SDA 2
GPIO3
OE: High Enable
Low Disable
VCCA
SCL1
VCCB
SDA1
FXMA 2104
I2C Buffer
Translator
SCL2
SDA 2
OE
SCL1
SDA 1
V_CC = 3.3V
Slave #2
SCL2
SDA 2
Slave #3
V_CCA :
1.65V – 5.5V V_CC
Domain
Figure 6. Bus Isolation
V_CCB :
1.65V – 5.5V V_CC
Domain
© 2011 Fairchild Semiconductor Corporation
FXMA2104 • Rev. 1.0.1
8
www.fairchildsemi.com