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FXMA2104 Datasheet, PDF (3/15 Pages) Fairchild Semiconductor – Dual-Supply, 4-Bit Voltage Translator / Buffer / Repeater
Pin Configuration
Figure 2. UMLP (Top-Through View)
Pin Definitions
Pin #
1
2
3, 4, 5, 6
7
8
9, 10, 11, 12
Name
VCCB
VCCA
A0, A1, A2, A3
GND
OE
B3, B2, B1, B0,
Description
B-Side Power Supply
A-Side Power Supply
A-Side Inputs or 3-State Outputs
Ground
Output Enable Input
B-Side Inputs or 3-State Outputs
Truth Table
Control
OE
Outputs
LOW Logic Level
3-State
HIGH Logic Level
Normal Operation
Note:
1. If the OE pin is driven LOW, the FXMA2104 is disabled and the A0, A1, A2, A3, B0, B1, B2 and B3 pins (including
dynamic drivers) are forced into 3-state.
© 2011 Fairchild Semiconductor Corporation
FXMA2104 • Rev. 1.0.1
3
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