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FOD073L_09 Datasheet, PDF (8/12 Pages) Fairchild Semiconductor – LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler
Package Dimensions
8-pin SOIC Surface Mount
8
0.164 (4.16)
0.144 (3.66)
1
0.202 (5.13)
0.182 (4.63)
0.143 (3.63)
0.123 (3.13)
0.010 (0.25)
0.006 (0.16)
0.021 (0.53)
0.011 (0.28)
0.050 (1.27) Typ.
Lead Coplanarity: 0.004 (0.10) MAX
0.008 (0.20)
0.003 (0.08)
0.244 (6.19)
0.224 (5.69)
Recommended Pad Layout
0.024 (0.61)
0.275 (6.99)
0.155 (3.94)
0.060 (1.52)
0.050 (1.27)
Dimensions in inches (mm).
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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2004 Fairchild Semiconductor Corporation
FOD073L Rev. 1.0
8
www.fairchildsemi.com