FDMC8200 Datasheet, PDF (8/11 Pages) Fairchild Semiconductor – Dual N-Channel PowerTrench® MOSFET 30 V, 9.5 mΩ and 20 mΩ

Typical Characteristics (Q2 N-Channel) T_J = 25 °C unless otherwise noted
10
I_D = 9 A
8
V_DD = 15 V
6
V_DD = 10 V
V_DD = 20 V
4
2
0
0
3
6
9
12
15
18
Qg, GATE CHARGE (nC)
Figure 19. Gate Charge Characteristics
100
100 us
10
1 ms
1
THIS AREA IS
LIMITED BY r_DS(on)
SINGLE PULSE
0.1
T_J = MAX RATED
R_θJA = 145 ^oC/W
T_C = 25 ^oC
0.01
0.01
0.1
1
10 ms
100 ms
1s
10 s
DC
10
100200
V_DS, DRAIN to SOURCE VOLTAGE (V)
Figure 21. Forward Bias Safe
Operating Area
1000
100
2000
1000
C_iss
C_oss
100
C_rss
f = 1 MHz
VGS = 0 V
10
0.1
1
10
30
V_DS, DRAIN TO SOURCE VOLTAGE (V)
Figure 20. Capacitance vs Drain
to Source Voltage
50
V_GS = 10 V
R_θJC = 4 ^oC/W
40
30
V_GS = 4.5 V
20
Limited by Package
10
0
25
50
75
100
125
150
T_c, CASE TEMPERATURE (^oC)
Figure 22. Maximum Continuous Drain
Current vs Case Temperature
V_GS = 10 V
SINGLE PULSE
R_θJA = 145 ^oC/W
T_A = 25 ^oC
10
1
0.5
10^-4
10^-3
10^-2
10^-1
1
t, PULSE WIDTH (s)
10
100
Figure 22. Single Pulse Maximum Power Dissipation
1000
©2009 Fairchild Semiconductor Corporation
8
FDMC8200 Rev.A1
www.fairchildsemi.com