FDMC8200 Datasheet, PDF (1/11 Pages) Fairchild Semiconductor – Dual N-Channel PowerTrench® MOSFET 30 V, 9.5 mΩ and 20 mΩ

FDMC8200
June 2009
Dual N-Channel PowerTrench^® MOSFET
30 V, 9.5 mΩ and 20 mΩ
Features
General Description
Q1: N-Channel
„ Max r_DS(on) = 20 mΩ at V_GS = 10 V, I_D = 6 A
„ Max r_DS(on) = 32 mΩ at V_GS = 4.5 V, I_D = 5 A
Q2: N-Channel
„ Max r_DS(on) = 9.5 mΩ at V_GS = 10 V, I_D = 9 A
„ Max r_DS(on) = 13.5 mΩ at V_GS = 4.5 V, I_D = 7 A
„ RoHS Compliant
This device includes two specialized N-Channel MOSFETs in a
dual Power33 (3mm x 3mm MLP) package. The switch node
has been internally connected to enable easy placement and
routing of synchronous buck converters. The control
MOSFET (Q1) and synchronous MOSFET (Q2) have been
designed to provide optimal power efficiency.
Applications
„ Mobile Computing
„ Mobile Internet Devices
„ General Purpose Point of Load
Pin 1
D1
D1
D1
G1
D1
D2/S1
S2
S2
S2
G2
VIN
VIN ^VIN
G^HS
VIN
SWITCH
NODE
S2 5
Q2
S2 6
S2 ₇
GND ^{GND GND}
G2 ₈
G^LS
BOTTOM
BOTTOM
Power 33
4 ^D1
3 ^D1
2 ^D1
Q1
1 ^G1
MOSFET Maximum Ratings T_C = 25 °C unless otherwise noted
Symbol
V_DS
V_GS
I_D
P_D
T_J, T_STG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current - Continuous (Package limited)
- Continuous (Silicon limited)
- Continuous
- Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 3)
T_C = 25 °C
T_C = 25 °C
T_A = 25 °C
T_A = 25 °C
T_A = 25 °C
Q1
Q2
30
30
±20
±20
18
18
23
45
8 ^1a
12 ^1b
40
1.9 ^1a
0.7 ^1c
40
2.2 ^1b
0.9 ^1d
-55 to +150
Units
V
V
A
W
°C
R_θJA
R_θJA
R_θJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
65 ^1a
180 ^1c
7.5
55 ^1b
145 ^1d
4
°C/W
Device Marking
FDMC8200
Device
FDMC8200
Package
Power 33
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
©2009 Fairchild Semiconductor Corporation
1
FDMC8200 Rev.A1
www.fairchildsemi.com