FOD3184S Datasheet, PDF (7/23 Pages) Fairchild Semiconductor – 3A Output Current, High Speed MOSFET/IGBT Gate Driver Optocoupler

Notes:
1. Derate linearly above +79°C free air temperature at a rate of 0.37mA/°C.
2. Maximum pulse width = 10µs.
3 Derate linearly above +79°C, free air temperature at the rate of 5.73mW/°C.
4. In this test, V_OH is measured with a dc load current of 100mA. When driving capacitive load V_OH will approach V_DD
as I_OH approaches zero amps.
5. Maximum pulse width = 1ms, maximum duty cycle = 20%.
6. t_PHL propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the
falling edge of the V_O signal. t_PLH propagation delay is measured from the 50% level on the rising edge of the input
pulse to the 50% level of the rising edge of the V_O signal.
7. PWD is defined as | t_PHL – t_PLH | for any given device.
8. The difference between t_PHL and t_PLH between any two FOD3184 parts under same operating conditions, with
equal loads.
9. Pin 1 and 4 need to be connected to LED common.
10. Common mode transient immunity in the high state is the maximum tolerable dV_CM/dt of the common mode pulse
V_CM to assure that the output will remain in the high state (i.e. V_O > 15V).
11. Common mode transient immunity in a low state is the maximum tolerable dV_CM/dt of the common mode pulse,
V_CM, to assure that the output will remain in a low state (i.e. V_O < 1.0V).
12. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000Vrms,
60Hz for 1 second (leakage detection current limit I_I-O < 10µA).
13. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted
together.
©2005 Fairchild Semiconductor Corporation
FOD3184 Rev. 1.0.4
7
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