FIN224AC_11 Datasheet, PDF (7/19 Pages) Fairchild Semiconductor – 22-Bit Bi-Directional Serializer/Deserializer

LVCMOS Data I/O
The LVCMOS input buffers have a nominal threshold
value equal to half V_DD. The input buffers are only oper-
ational when the device is operating as a serializer.
When the device is operating as a deserializer, the inputs
are gated off to conserve power.
The LVCMOS 3-STATE output buffers are rated for a
source / sink current of approximately 0.5mA at 1.8V.
The outputs are active when the DIRI signal and either
S1 or S2 is asserted HIGH. When the DIRI signal and
either S1 or S2 is asserted LOW, the bi-directional LVC-
MOS I/Os is in a HIGH-Z state. Under purely capacitive
load conditions, the output swings between GND and
V_DDP. When S1 or S2 initially transitions HIGH, the initial
state of the deserializer LVCMOS outputs is zero.
Unused LVCMOS input buffers must be either tied off to
a valid logic LOW or a valid logic HIGH level to prevent
static current draw due to a floating input. Unused LVC-
MOS output should be left floating. Unused bi-directional
pins should be connected to GND through a high-value
resistor. If a FIN224AC device is configured as an unidi-
rectional serializer, unused data I/O can be treated as
unused inputs. If the FIN224AC is hardwired as a deseri-
alizer, unused data I/O can be treated as unused outputs.
© 2006 Fairchild Semiconductor Corporation
FIN224AC Rev.1.1.6
7
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