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FIN224AC_11 Datasheet, PDF (3/19 Pages) Fairchild Semiconductor – 22-Bit Bi-Directional Serializer/Deserializer
Terminal Description
Terminal
Name
DP[1:20]
DP[21:22]
DP[23:24]
CKREF
STROBE
CKP
DSO+ / DSI-
DSO- / DSI+
CKSI+
CKSI-
CKSO+
CKSO-
S1
S2
DIRI
DIRO
VDDP
VDDS
VDDA
GND
I/O Type
I/O
I
O
IN
IN
OUT
DIFF-I/O
DIFF-IN
DIFF-OUT
IN
IN
IN
OUT
Supply
Supply
Supply
Supply
Number of
Terminals
20
2
2
1
1
1
2
2
2
1
1
1
1
1
1
1
2
Description of Signals
LVCMOS parallel I/O, Direction controlled by DIRI pin
LVCMOS parallel unidirectional inputs
LVCMOS unidirectional parallel outputs
LVCMOS clock input and PLL reference
LVCMOS strobe signal for latching data into the serializer
LVCMOS word clock output
CTL differential serial I/O data signals(1.)
DSO: Refers to output signal pair
DSI: Refers to input signal pair
DSO(I)+: Positive signal of DSO(I) pair
DSO(I)-: Negative signal of DSO(I) pair
CTL differential deserializer input bit clock
CKSI: Refers to signal pair
CKSI+: Positive signal of CKSI pair
CKSI-: Negative signal of CKSI pair
CTL differential serializer output bit clock
CKSO: Refers to signal pair
CKSO+: Positive signal of CKSO pair
CKSO-: Negative signal of CKSO pair
LVCMOS mode selection terminals used to select frequency range for
the reflect, CKREF
LVCMOS control input used to control direction of data flow:
DIRI = “1” Serializer
DIRI = “0” Deserializer
LVCMOS control output inversion of DIRI
Power supply for parallel I/O and translation circuitry
Power supply for core and serial I/O
Power supply for analog PLL circuitry
For ground signals (2 for µBGA, 1 for MLP)
Note:
1. The DSO/DSI serial port pins have been arranged such that if one device is rotated 180 degrees with respect to the
other device, the serial connections properly align without the need for any traces or cable signals to cross. Other
layout orientation may require that traces or cables cross.
© 2006 Fairchild Semiconductor Corporation
FIN224AC Rev.1.1.6
3
www.fairchildsemi.com