FAN7080_12 Datasheet, PDF (7/17 Pages) Fairchild Semiconductor – Half Bridge Gate Driver

Typical Waveforms
IN
SD/DT
HO
LO
Figure 1. Input/output Timing Diagram
VCC=VBS=15V, -40C < tj < 125C
3000
2500
2000
1500
1000
Max.
500
Typ.
0
1.0
1.5
2.0
2.5
3.0
3.5
VDT, Deadtime Voltage(V)
Figure 2. Dead Time VS VDT
IN(LO)
50%
IN(HO)
t_on
t_r
50%
t_off
t_f
90% 90%
LO
HO
10%
10%
Figure 3. Switching Time Waveform Definitions
PWM(LO)
PWM(HO)
50%
50%
LO HO
MTON
10%
90%
MTOFF
LO HO
Figure 5. Delay Matching Waveform Definitions
SD
50%
t_sd
HO
90%
LO
Figure 4. Shutdown Waveform Definitions
50%
50%
IN
90%
HO
10%
LO
DT1
DT2
90%
10%
Figure 6. Dead Time Waveform Definitions
©2012 Fairchild Semiconductor Corporation
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FAN7080_GF085 Rev. 1.0.1
www.fairchildsemi.com