FAN7080_12 Datasheet, PDF (2/17 Pages) Fairchild Semiconductor – Half Bridge Gate Driver

Block Diagrams
VCC
vreg
IN
DEADTIME
500kΩ
CONTROL
PULSE
GENERATOR
VB
UVLO
R
PULSE
RQ
HO
FILTER
S
VS
SD/DT
vreg
VCC
500kΩ
DELAY
UVLO
VCC
LO
COM
Pin Assignments
1
VCC
2 _IN
VB ⁸
7
HO
3 _{SD/DT VS 6}
4 _{COM LO} 5
Pin Definitions
Pin Number
1
2
3
4
5
6
7
8
Pin Name
VCC
IN
SD/DT
COM
LO
VS
HO
VB
I/O
Pin Function Description
P
Driver supply voltage
I
Logic input for high and low side gate drive output
I
Shut down input and dead time setting
P
Ground
A
Low side gate drive output for MOSFET Gate connection
A
High side floating offset for MOSFET Source connection
A
High side drive output for MOSFET Gate connection
P
Driver output stage supply
©2012 Fairchild Semiconductor Corporation
2
FAN7080_GF085 Rev. 1.0.1
www.fairchildsemi.com