FXMAR2102 Datasheet, PDF (6/16 Pages) Fairchild Semiconductor – Dual-Supply, 2-Bit Voltage Translator / Isolator for I2C Applications

Application Information
The FXMAR2102 has open-drain I/Os and includes a
total of four 10K・ internal pull-up resistors (R_PU) on
each of the four data I/O pins, as shown in Figure 4. If a
pair of data I/O pins (A_n/B_n) is not used, both pins should
disconnected, eliminating unwanted current flow through
the internal RPUs. External RPUs can be added to the
I/Os to reduce the total RPU value, depending on the
total bus capacitance. The designer is free to lower the
total pull-up resistor value to meet the maximum I²C
edge rate per the I²C specification (UM10204 rev. 03,
June 19, 2007). For example, according to the I²C
specification, the maximum edge rate (30% - 70%)
during Fast Mode (400kbit/s) is 300ns. If the bus
capacitance is approaching the maximum 400pF, a
lower
300ns
total R_PU value helps keep
(Fast Mode). Likewise, the
the rise time below
I²C specification also
specifies a minimum Serial Clock Line High Time of
600ns during Fast Mode (400KHz). Lowering the total
RPU also helps increase the SCL High Time. If the bus
capacitance approaches 400pF, it may make sense to
use the FXMA2102, which does not contain internal
RPUs. Then calculate the ideal external R_PU value.
Note:
5. Section 7.1 of the I²C specification provides an
excellent guideline for pull-up resistor sizing.
Theory of Operation
The FXMAR2102 is designed for high-performance level
shifting and buffer / repeating in an I²C application.
Figure 1 shows that each bi-directional channel contains
two series-Npassgates and two dynamic drivers. This
hybrid architecture is highly beneficial in an I²C
application where auto-direction is a necessity.
For example, during the following three I²C protocol
events:
 Clock Stretching
 Slave’s ACK Bit (9^th bit = 0) following a Master’s
Write Bit (8^th bit = 0)
 Clock Synchronization and Multi-Master
Arbitration
the bus direction needs to change from master-to-slave
to slave-to-master without the occurrence of an edge. If
there is an I²C translator between the master and slave
in these examples, the I²C translator must change
direction when both A and B ports are LOW. The
Npassgates can accomplish this task very efficiently
because, when both A and B ports are LOW, the
Npassgates act as a low-resistive short between the A
and B ports.
Due to I²C’s open-drain topology, I²C masters and
slaves are not push/pull drivers. Logic LOWs are “pulled
down” (I_sink), while logic HIGHs are “let go” (3-state). For
example, when the master lets go of SCL (SCL always
comes from the master), the rise time of SCL is largely
determined by the RC time constant, where R = R_PU and
C = the bus capacitance. If the FXMAR2102 is attached
to the master [on the A port] and there is a slave on the
B port, the Npassgates act as a low-resistive short
between both ports until either of the port’s V_CC/2
thresholds are reached. After the RC time constant has
reached the V_CC/2 threshold of either port, the port’s
edge detector triggers both dynamic drivers to drive
their respective ports in the LOW-to-HIGH (LH)
direction, accelerating the rising edge. The resulting rise
time resembles the scope shot in Figure 5. Effectively,
two distinct slew rates appear in rise time. The first slew
rate (slower) is the RC time constant of the bus. The
second slew rate (much faster) is the dynamic driver
accelerating the edge.
If both the A and B ports of the translator are HIGH, a
high-impedance path exists between the A and B ports
because both the Npassgates are turned off. If a master
or slave device decides to pull SCL or SDA LOW, that
device’s driver pulls down (I_sink) SCL or SDA until the
edge reaches the A or B port V_CC/2 threshold. When
either the A or B port threshold is reached, the port’s
edge detector triggers both dynamic drivers to drive
their respective ports in the HIGH-to-LOW (HL)
direction, accelerating the falling edge.
Figure 5. Waveform C: 600pF, Total R_PU: 2.2K
© 2011 Fairchild Semiconductor Corporation
FXMAR2102 • Rev. 1.0.0
6
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