FXMAR2102 Datasheet, PDF (15/16 Pages) Fairchild Semiconductor – Dual-Supply, 2-Bit Voltage Translator / Isolator for I2C Applications

Physical Dimensions
0.10 C
2X
1.40
AB
1.20
TOP VIEW
0.10 C
2X
0.05 C ^{0.55 MAX}
0.05 C
0.025
SEATING _C
PLANE
0.00
SIDE VIEW
(0.15)
0.40
DETAIL A
2
4
0.35
0.25
(7X)
1
5
PIN#1 IDENT
8
6
(0.20)
0.25
0.15
(8X)
0.10
BOTTOM VIEW ^0.05
CAB
C
0.725
0.40
1.45
1.25
0.45
(7X) 0.35
0.625
0.25
(8X)
RECOMMENDED
LAND PATTERN
0.30
0.10
45°
0.20
0.10
DETAIL : A
SCALE : 2X
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP08Arev2.
PACKAGE
EDGE
LEAD
OPTION 1
SCALE : 2X
LEAD
OPTION 2
SCALE : 2X
Figure 17.8-Lead Ultrathin MLP, 1.2mm x 1.4mm
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2011 Fairchild Semiconductor Corporation
FXMAR2102 • Rev. 1.0.0
15
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