FDR8308P Datasheet, PDF (6/8 Pages) Fairchild Semiconductor – Dual P-Channel, Logic Level, PowerTrenchTM MOSFET

SuperSOT^TM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape
Configuration: Figure 3.0
T
P0
D0
E1
K0
Wc
B0
F
W
E2
Tc
A0
P1
D1
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
W
D0
D1
E1
E2
F
P1
P0
SSOT-8
(12mm)
4.47
+/-0.10
5.00
+/-0.10
12.0
+/-0.3
1.55
+/-0.05
1.50
+/-0.10
1.75
+/-0.10
10.25
min
5.50
+/-0.05
8.0
+/-0.1
4.0
+/-0.1
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum
Typical
component
cavity
B0
center line
20 deg maximum component rotation
Sketch A (Side or Front Sectional View)
Component Rotation
Typical
component
A0
center line
SSOT-8 Reel Configuration: Figure 4.0
Sketch B (Top View)
Component Rotation
K0
T
Wc
Tc
1.37
+/-0.10
0.280
+/-0.150
9.5
+/-0.025
0.06
+/-0.02
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
W1 Measured at Hub
Dim A
Max
Dim A
max
Dim N
See detail AA
7” Diameter Option
B Min
Dim C
See detail AA
Dim D
W3
min
13” Diameter Option
W2 max Measured at Hub
Tape Size
Reel
Option
12mm
7” Dia
12mm
13” Dia
Dimensions are in inches and millimeters
Dim A Dim B
Dim C
7.00
177.8
13.00
330
0.059
1.5
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
512 +0.020/-0.008
13 +0.5/-0.2
Dim D
0.795
20.2
0.795
20.2
Dim N
5.906
150
7.00
178
Dim W1
0.488 +0.078/-0.000
12.4 +2/0
0.488 +0.078/-0.000
12.4 +2/0
© 1998 Fairchild Semiconductor Corporation
DETAIL AA
Dim W2
0.724
18.4
0.724
18.4
Dim W3 (LSL-USL)
0.469 – 0.606
11.9 – 15.4
0.469 – 0.606
11.9 – 15.4
November 1998, Rev. A