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74LCX07MX Datasheet, PDF (6/12 Pages) Fairchild Semiconductor – Low Voltage Hex Buffer with Open Drain Outputs
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AC Loading and Waveforms
Test
tPZL, tPLZ
Switch
VCC x 2 at VCC = 5.0 ± 0.5V
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
Figure 1. AC Test Circuit (CL includes probe and jig capacitance)
3-STATE Output Low Enable and
Disable Times for Logic
trise and tfall
Symbol
Vmi
Vmo
Vx
Vy
5.0V ± 0.5V
VCC / 2
VCC / 2
VOL + 0.3V
VOH – 0.3V
VCC
3.3V ± 0.3V
2.7V
1.5V
1.5V
1.5V
1.5V
VOL + 0.3V
VOH – 0.3V
VOL + 0.3V
VOH – 0.3V
2.5V ± 0.2V
VCC / 2
VCC / 2
VOL + 0.15V
VOH – 0.15V
Figure 2. Waveforms (Input Pulse Characteristics; f =1MHz, tr = tf = 3ns)
©1999 Fairchild Semiconductor Corporation
74LCX07 Rev. 1.11.0
6
www.fairchildsemi.com
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