ILC7082 Datasheet, PDF (5/16 Pages) Impala Linear Corporation – 150MA SOT-23 ULTRA LOW NOISE CMOS RF-LDO REGULATOR

ILC7082
Operation
The ILC7082 LDO design is based on an advanced circuit
configuration for which patent protection has been applied.
Typically it is very difficult to drive a capacitive output with
an amplifier. The output capacitance produces a pole in the
feedback path, which upsets the carefully tailored dominant
pole of the internal amplifier. Traditionally the pole of the
output capacitor has been “eliminated” by reducing the
output impedance of the regulator such that the pole of the
output capacitor is moved well beyond the gain bandwidth
product of the regulator. In practice, this is difficult to do and
still maintain high frequency operation. Typically the output
impedance of the regulator is not simply resistive, such that
the reactive output impedance interacts with the reactive
impedance of the load resistance and capacitance. In addi-
tion, it is necessary to place the dominant pole of the circuit
at a sufficiently low frequency such that the gain of the regu-
lator has fallen below unity before any of the complex inter-
actions between the output and the load occur. The ILC7082
does not try to eliminate the output pole, but incorporates it
into the stability scheme. The load and output capacitor
forms a pole, which rolls off the gain of the regulator below
unity. In order to do this the output impedance of the regula-
tor must be high, looking like a current source. The output
stage of the regulator becomes a transconductance amplifier,
which converts a voltage to a current with a substantial
output impedance. The circuit which drives the transconduc-
tance amplifier is the error amplifier, which compares the
regulator output to the band gap reference and produces an
error voltage as the input to the transconductance amplifier.
The error amplifier has a dominant pole at low frequency and
a “zero” which cancels out the effects of the pole. The zero
allows the regulator to have gain out to the frequency where
the output pole continues to reduce the gain to unity. The
configuration of the poles and zero are shown in Figure 1.
Instead of powering the critical circuits from the unregulated
input voltage, the CMOS RF LDO powers the internal
circuits such as the bandgap, the error amplifier and most of
the transconductance amplifier from the boot strapped regu-
lated output voltage of the regulator. This technique offers
extremely high ripple rejection and excellent line transient
response.
Dominant Pole
85 dB
Compensating
Zero
Unity Gain
Output Pole
Frequency
Figure 1. ILC7082 RF LDO Frequency Response
A block diagram of the regulator circuit used in the ILC7082
is shown in Figure 2, which shows the input-to-output isola-
tion and the cascaded sequence of amplifiers that implement
the pole-zero scheme previously outlined.
V_IN
C_NOISE
BANDGAP
REFERENCE
V_REFD
INTERNAL V_DD
ERROR
AMPLIFIER
TRANS-
CONDUCTANCE
AMPLIFIER
GND
FEEDBACK
V_OUT
ON/OFF
Figure 2. ILC7082 RF LDO Regulator Block Diagram
The ILC7082 is designed in a CMOS process with some
minor additions, which allow the circuit to be used at
input voltages up to 13V. The resulting circuit exceeds the
frequency response of traditional bipolar circuits. The
ILC7082 is very tolerant of output load conditions with the
inclusion of both short circuit and thermal overload protec-
tion. The device has a very low dropout voltage, typically a
linear response of 1mV per 1mA of load current, and none of
the quasi-saturation characteristics of a bipolar output
devices. All the features of the frequency response and
regulation are valid right to the point where the regulator
goes out of regulation in a 4mV transition region. Because
there is no base drive, the regulator is capable of providing
high current surges while remaining in regulation. This is
shown in the high peak current of 500mA which allows for
the ILC7082 to be used in systems that require short burst
mode operation.
Shutdown (ON/OFF) Operation
The ILC7082 output can be turned off by applying 0.6V or
less to the device’s ON/OFF pin. In shutdown mode, the
ILC7082 draws less than 1mA quiescent current. The output
of the ILC7082 is enabled by applying 1.5V to 13V at the
ON/OFF pin. In applications were the ILC7082 output will
always remain enabled, the ON/OFF pin may be connected
to V_IN. The ILC7082’s shutdown circuitry includes hystere-
sis, as such the device will operate properly even if a slow
moving signal is applied to the ON/OFF pin.
Short Circuit Protection
The ILC7082 output can withstand momentary short circuit
to ground. Moreover, the regulator can deliver very high
output peak current due to its 1A instantaneous short circuit
current capability.
REV. 1.6.2 11/17/04
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