HCPL0601R2 Datasheet, PDF (5/18 Pages) Fairchild Semiconductor – High Speed-10 MBit/s Logic Gate Optocouplers

Transfer Characteristics (T_A = -40°C to +85°C unless otherwise specified.)
Symbol DC Characteristics
Test Conditions
Min.
I_OH High Level Output Current
V_OL Low Level Output Voltage
I_FT Input Threshold Current
V_CC = 5.5V, V_O = 5.5 V, I_F = 250µA,
V_E = 2.0V⁽²⁾
V_CC = 5.5V, I_F = 5mA, V_E = 2.0V,
I_OL = 13mA⁽²⁾
V_CC = 5.5V, V_O = 0.6V, V_E = 2.0V,
I_OL = 13mA
Typ.*
Max.
100
0.6
5
Isolation Characteristics (T_A = -40°C to +85°C unless otherwise specified.)
Symbol
Characteristics
Test Conditions
Min.
I_I-O
Input-Output
Insulation Leakage Current
V_ISO
Withstand Insulation Test Voltage
R_I-O
Resistance (Input to Output)
C_I-O
Capacitance (Input to Output)
*All typical values are at V_CC = 5 V, T_A = 25°C
Relative humidity = 45%,
T_A = 25°C, t = 5s,
V_I-O = 3000 VDC⁽¹¹⁾
R_H < 50%, T_A = 25°C,
I_I-O ≤ 2µA, t = 1 min.⁽¹¹⁾
V_I-O = 500V⁽¹¹⁾
f = 1MHz⁽¹¹⁾
3750
Typ.*
10¹²
0.6
Max.
1.0*
Unit
µA
V
mA
Unit
µA
V_RMS
Ω
pF
Notes:
1. The V_CC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package V_CC and GND pins of each device.
2. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
3. t_PLH – Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current
pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
4. t_PHL – Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current
pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
5. t_r – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
6. t_f – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
7. t_ELH – Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input
voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
8. t_EHL – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input
voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
9. CM_H – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high
state (i.e., V_OUT > 2.0V). Measured in volts per microsecond (V/µs).
10. CM_L – The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low
output state (i.e., V_OUT < 0.8V). Measured in volts per microsecond (V/µs).
11. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.
©2006 Fairchild Semiconductor Corporation
HCPL06XX Rev. 1.0.9
5
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