HCPL-2731 Datasheet, PDF (5/15 Pages) Fairchild Semiconductor – LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS

Isolation Characteristics (T_A = 0 to 70°C Unless otherwise specified)
Characteristics
Test Conditions Symbol Min
Input-output
insulation leakage current
Withstand insulation test voltage
Resistance (input to output)
Capacitance (input to output)
Input-Input
Insulation leakage current
Input-Input Resistance
Input-Input Capacitance
(Relative humidity = 45%)
(T_A = 25°C, t = 5 s)
(V_I-O = 3000 VDC)
(Note 8)
(RH ≤ 50%, T_A = 25°C)
(Note 4) ( t = 1 min.)
(Note 4) (V_I-O = 500 VDC)
(Note 4, 5) (f = 1 MHz)
(RH ≤ 45%, V_I-I = 500 VDC) (Note 6)
t = 5 s, (HCPL-2730/2731 only)
(V_I-I = 500 VDC) (Note 6)
(HCPL-2730/2731 only)
(f = 1 MHz) (Note 6)
(HCPL-2730/2731 only)
I_I-O
V_ISO
R_I-O
C_I-O
I_I-I
R_I-I
C_I-I
2500
** All Typicals at T_A = 25°C
Typ** Max
1.0
10¹²
0.6
0.005
10¹¹
0.03
Unit
µA
V_RMS
Ω
pF
µA
Ω
pF
Notes
1. Current Transfer Ratio is defined as a ratio of output collector current, I_O, to the forward LED input current, I_F, times 100%.
2. Pin 7 open. (6N138 and 6N139 only)
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV_cm/dt on the leading edge of the com-
mon mode pulse signal V_CM, to assure that the output will remain in a logic high state (i.e., V_O>2.0 V). Common mode transient
immunity in logic low level is the maximum tolerable (negative) dV_cm/dt on the trailing edge of the common mode pulse signal,
V_CM, to assure that the output will remain in a logic low state (i.e., V_O<0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. For dual channel devices, C_I-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shorted
together.
6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
I
5
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.0
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