HCPL-2731 Datasheet, PDF (11/15 Pages) Fairchild Semiconductor – LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS

Pulse
Generator
tr = 5ns
I_F
Z _O = 50 V
10% D.C.
I/ f< 100 ms
Noise
Shield
1
2
V_F
3
I_F Monitor
R_m
4
8 ^VCC
7 ^VB
+5 V
R_L
Pulse
Generator
IF
tr = 5ns
Z _O = 50 V
10% DUTY CYCLE
I/f < 100 µS
+
1
VF1
-₂
6 ^VO
0.1 µF
5
GND
V_O
CL = 15 pF*
IF
MONITOR
Rm
-₃
VF2
+₄
Noise
Shield
VCC
8
RL
V01
7
V02
6
GND
5
0.1 µF
+5 V
VO
CL = 15 pF*
Test Circuit for 6N138, 6N139
I_F
Test Circuit for HCPL-2730 and HCPL-2731
VO
TPHL
1.5 V
5V
1.5 V
V_OL
TPLH
Fig. 22 Switching Time Test Circuit
I_F
A
B
V_FF
Noise
Shield
1
2
V_F
3
4
8 ^VCC
+5 V
7 ^VB
R_L
6 ^VO
VO
0.1 µF
GND
5
-
+
V_-CM
Pulse Gen
I_F
A
B
V_FF
Test Circuit for 6N138 and 6N139
VCM 10 V
10%
0V
t_r
90% 90%
+₁
VF1
-₂
Noise
Shield
-₃
VF2
+
4
VCC
8
RL
V01
7
V02
6
GND
5
V_CM
+
-
Pulse Gen
Test Circuit for HCPL-2730 and HCPL-2731
10%
t_f
+5 V
VO
0.1 µF
VO
5V
Switch at A : I _F= 0 mA
VO
VOL
Switch at B : I _F= 1.6 mA
Fig. 23 Common Mode Immunity Test Circuit
11
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL-2730, HCPL-2731 Rev. 1.0.0
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