GTLP36T612 Datasheet, PDF (5/8 Pages) Fairchild Semiconductor – 36-Bit LVTTL/GTLP Universal Bus Transceiver

DC Electrical Characteristics (Continued)
Symbol
Test Conditions
Min
Typ
Max
(Note 9)
Units
∆I_CC
(Note 12)
A Port and
Control Pins
V_CC = 3.45V,
One Input at 2.7V
A or Control Inputs at V_CC or GND
C_i
Control Pins
V_I = V_CC or 0
A Port
V_I = V_CC or 0
B Port
V_I = V_CC or 0
Note 9: All typical values are at V_CC = 3.3V, V_CCQ = 3.3V, and T_A = 25°C.
2
mA
6
7.5
pF
9.0
Note 10: GTLP V_REF and V_TT are specified to 2% tolerance since signal integrity and noise margin can be significantly degraded if these supplies are noisy.
In addition, V_TT and Rterm can be adjusted beyond the recommended operating conditions to accommodate backplane impedances other than 50Ω, but
must remain within the boundaries of the DC Absolute Maximum ratings. Similarly V_REF can be adjusted to optimize noise margin.
Note 11: For conditions shown as Min or Max, use the appropriate value specified under recommended operating conditions.
Note 12: This is the increase in supply current for each input that is at the specified TTL voltage level rather than V_CC or GND.
AC Operating Requirements
Over recommended ranges of supply voltage and operating free-air temperature, V_REF = 1.0V (unless otherwise noted).
Symbol
Test Conditions
Min
Max
f_MAX
Maximum Clock Frequency
175
t_WIDTH
Pulse Duration
LEAB or LEBA HIGH
3.0
CLKAB or CLKBA HIGH or LOW
3.0
t_SU
Setup Time
A before CLKAB↑
1.1
B before CLKBA↑
3.0
A before LEAB
1.1
B before LEBA
2.7
Unit
MHz
ns
ns
CEAB before CLKAB↑
1.2
t_HOLD
Hold Time
CEBA before CLKBA↑
1.4
A after CLKAB↑
0.0
B after CLKBA↑
0.0
A after LEAB
B after LEBA
0.8
0.0
ns
CEAB after CLKAB↑
1.0
CEBA after CLKBA↑
1.9
5
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