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| GTLP18T612 Datasheet, PDF (5/9 Pages) Fairchild Semiconductor – 18-Bit LVTTL/GTLP Universal Bus Transceiver | |||
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DC Electrical Characteristics (Continued)
Symbol
Test Conditions
Typ
Min
Max
(Note 7)
Units
ICC
A or B Ports
VCC = 3.45V
Outputs HIGH
(VCC/VCCQ)
IO = 0
Outputs LOW
VI = VCC or GND
Outputs Disabled
âICC
A Port and
VCC = 3.45V,
One Input at 2.7V
(Note 10) Control Pins
A or Control Inputs at VCC or GND
Ci
Control Pins
VI = VCC or 0
A Port
VI = VCC or 0
B Port
VI = VCC or 0
Note 7: All typical values are at VCC = 3.3V, VCCQ = 3.3V, and TA = 25°C.
30
40
30
40
mA
30
45
0
2
mA
6
7.5
pF
9.0
Note 8: GTLP VREF and VTT are specified to 2% tolerance since signal integrity and noise margin can be significantly degraded if these supplies are noisy. In
addition, VTT and Rterm can be adjusted beyond the recommended operating conditions to accommodate backplane impedances other than 50â¦, but must
remain within the boundaries of the DC Absolute Maximum ratings. Similarly VREF can be adjusted to optimize noise margin.
Note 9: For conditions shown as Min or Max, use the appropriate value specified under recommended operating conditions.
Note 10: This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
AC Operating Requirements
Over recommended ranges of supply voltage and operating free-air temperature, VREF = 1.0V (unless otherwise noted).
Symbol
Test Conditions
Min
Max
fCLOCK
tWIDTH
tSU
Maximum Clock Frequency
Pulse Duration
Setup Time
LEAB or LEBA HIGH
CLKAB or CLKBA HIGH or LOW
A before CLKABâ
B before CLKBAâ
A before LEAB
B before LEBA
0
175
3.0
3.0
1.1
3.0
1.1
2.7
CEAB before CLKABâ
1.2
tHOLD
Hold Time
CEBA before CLKBAâ
1.4
A after CLKABâ
0.0
B after CLKBAâ
0.0
A after LEAB
0.8
B after LEBA
0.0
CEAB after CLKABâ
1.0
CEBA after CLKBAâ
1.9
Unit
MHz
ns
ns
ns
5
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