FMS6243 Datasheet, PDF (5/10 Pages) Fairchild Semiconductor – Low-Cost, 3-Channel, SD Video Filter Drivers with External Delay Control

Application Information
The FMS6243 Low-Cost Video Filter (LCVF) provides
6dB gain from input to output. In addition, the input is
slightly offset to optimize the output driver performance.
The offset is held to the minimum required value to
decrease the standing DC current into the load. Typical
voltage levels are shown in the diagram below:
I/O Configurations
For DC-coupled DAC drive with DC-coupled outputs, use
this configuration:
Figure 5. DC-Coupled Inputs and Outputs
Alternatively, if the DAC’s average DC output level
causes the signal to exceed the range of 0V to 1.4V, it
can be AC-coupled as follows:
Figure 3. Typical Voltage Levels
The FMS6243 provides an internal diode clamp to sup-
port AC-coupled input signals. If the input signal does not
go below ground, the input clamp does not operate. This
allows DAC outputs to directly drive the FMS6243 without
an AC coupling capacitor. When the input is AC-coupled,
the diode clamp sets the sync tip (or lowest voltage) just
below ground. The worst-case sync tip compression due
to the clamp can not exceed 7mV. The input level set by
the clamp combined with the internal DC offset keeps the
output within its acceptable range.
For symmetric signals like Chroma, U, V, Pb, and Pr, the
average DC bias is fairly constant and the inputs can be
AC-coupled with the addition of a pull-up resistor to set
the DC input voltage. DAC outputs can also drive these
signals without the AC-coupling capacitor. A conceptual
illustration of the input clamp circuit is shown below:
Figure 6. AC-Coupled Inputs, DC-Coupled Outputs
When driven by an unknown external source or a
SCART switch with its own clamping circuitry, the inputs
should be AC-coupled like this:
Figure 7. SCART with DC-Coupled Outputs
The same method can be used for biased signals with
the addition of a pull-up resistor to make sure the clamp
never operates. The internal pull-down resistance is
800kΩ ±20% so the external resistance should be
7.5MΩ to set the DC level to 500mV.
Figure 4. Input Clamp Circuit
© 2007 Fairchild Semiconductor Corporation
FMS6243 Rev. 1.0.0
Figure 8. Biased SCART with DC-Coupled Outputs
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