AN4107 Datasheet, PDF (5/14 Pages) Fairchild Semiconductor – Design of Power Factor Correction

APPLICATION NOTE
AN4107
t_off
=
L
----I--^L---⁽--^p---^e--^a---^k---⁾-⁽---t--⁾----
V_O – sin(ωt)
=
L
-------2---I--ⁱ--ⁿ---⁽--^p--^e---^a--^k---⁾--s---i-n----⁽--^ω-----t--⁾-------
V_O – V_in(peak) sin (ωt)
I_in(peak) = -_η-----_â‹-2--V--V--_i--_nO---₍-I_p--^O-_e---_a--_k---₎
(2)
(3)
T_S = ton + toff
=
2
LIi
n
(p
ea
k
)



-------------1---------------
Vin_(peak)
+
-V----O------_–----V-----i-n--s--₍-i--np---e⁽---^ω-a---t-k--⁾--₎--s---i--n----₍--_ω-----t--_{)}
(4)
= -4---L----V----O------I-_η^O------(--m------a---x----⁾ _{V-----2---i--n----(}-1-p----e----a----k----₎ + _{V-----i--n---(}---p---e----a----k----₎--₍---V----O-1-----_–----V-----i-n----₍---p---e----a----k----₎--_{)}
TS _{( m a x )}
=
-4---L----V----O------I-O------⁽--m-----a----x----⁾
η



---------------1-----------------
V2in(peak)
+
V-----i-n----₍^{---p---e----a----k----}₎^--(^{--V-----O-1-----}–^{----V-----i-n----}₍^{---p---e----a----k---}₎^---)
(5)
L = --------------------------------------------------------------------------------------------^η---------------------------------------------------------------------------------------------- (6)
4fsw_(m
i
n)
VOIO
(
ma
x)



---------------1-----------------
V2in(peak)
+
V-----i--n---₍^{---p----e---a----k----}₎^--(^{---V----O-1-----}–^{----V-----i--n---}₍^{---p----e---a----k----}₎^--)
2) Auxiliary winding design
The auxiliary winding voltage is lowest at the highest line.
So the number of auxiliary winding can be obtained by (7).
A small resistor is connected to the auxiliary winding to
suppress the high frequency ringing voltage.
N_aux = --------------V----^C----^C-----^â‹--N-----^P---------------
(7)
 ^{V O}
–
2----_π----2--
V_i

n ( H L )_
3) Input capacitor design
The voltage ripple of the input capacitor is maximum when
the line is lowest and the load is heaviest. If f_sw(min) >> f_ac ,
the input current can be assumed to be constant during a
switching period.
Inductor
Current
Input
Current
2 ⋅ I _{in( peak _ max)}
I _{in( peak _ max)}
t_on / 2
t _on
Figure 7. Input Current and Inductor Current Waveform during a Switching Cycle
∫ ^Cin
≥
------------2------------
∆V_in(max)
⋅
t---o---n-
2
0
 ^{I i n ( p e a k _max )}
–
2-----⋅_{---I--i--n---(-p---e---a--k---_--m----a--x--)}
t_on
t_
dt
≥
-t-^o---ⁿ----^â‹---I--ⁱ--ⁿ---⁽-^p---^e---^a--^k---^_--^m----^a--^x--⁾
2 ⋅ ∆V_in(max)
(8)
≥
-----------L------^â‹---I--²--^O----⁽--^m----^a--^x---⁾---^â‹---V-----²--^O-------------
∆V_in(max) ⋅ V³ⁱⁿ(peak_max)
The input capacitor must be larger than the value calculated
by (8). And the maximum input capacitance is limited by the
input displacement factor(IDF), defined as IDF≡cosθ .
Therefore the input capacitor must be smaller than C_in(max)
calculated by (12).
©2001 Fairchild Semiconductor Corporation
V_a = V_A = V_in(peak) cos (ωt)
(9)
i_a = I_a cos(ωt)
i_A = i_a + i_c = I_a cos (ωt) – ωC_inV_in(peak) sin(ωt)
( 10 )
θ
=
tan
–1 ^ω_-----C----i_--n_---V----i_--n_---(_-p_---e_---a_--k_--)
I_a
(11)
C_in(max)
=
------------I--^a------------
ωV_in(peak)
tan
(
cos
–1_(IDF))
=
------------2---V-----^O----I--^O-------------
ω V ² i n ( p e a k _max )
tan
(
cos
–1_(IDF))
( 12 )
5