RV4141A_05 Datasheet, PDF (4/7 Pages) Fairchild Semiconductor – Low Power Ground Fault Interrupter

PRODUCT SPECIFICATION
RV4141A
Circuit Operation
(Refer to Block Diagram and Figure 1)
The precision op amp connected to Pins 1 through 3 senses
the fault current flowing in the secondary of the sense trans-
former, converting it to a voltage at Pin 1. The ratio of sec-
ondary current to output voltage is directly proportional to
feedback resistor, RSET.
RSET converts the sense transformer secondary current to a
voltage at Pin 1. Due to the virtual ground created at the
sense amplifier input by its negative feedback loop, the sense
transformer's burden is equal to the value of RIN. From the
transformer's point of view, the ideal value for RIN is 0Ω.
This will cause it to operate as a true current transformer
with minimal error. However, making RIN equal to zero cre-
ates a large offset voltage at Pin 1 due to the sense amplifier's
very high DC gain. RIN should be selected as high as possi-
ble consistent with preserving the transformer's operation as
a true current mode transformer. A typical value for RIN is
between 200 and 1000Ω.
As seen by the equation below, maximizing RIN minimizes
the DC offset error at the sense amplifiers output. The DC
offset voltage at Pin 1 contributes directly to the trip current
error. The offset voltage at Pin 1 is:
VOS x RSET/(RIN + RSEC)
Where:
VOS = Input offset voltage of sense amplifier
RSET = Feedback resistor
RIN = Input resistor
RSEC = Transformer secondary winding resistance
The sense amplifier has a specified maximum offset voltage
of 200 µV to minimize trip current errors.
Two comparators connected to the sense amplifier output are
configured as a window detector, whose references are -6.5V
and +6.5V, referred to Pin 3. When the sense transformer
secondary RMS current exceeds 4.6/RSET the output of the
window detector starts the delay circuit. If the secondary cur-
rent exceeds the predetermined trip current for longer than
the delay time a current pulse appears at Pin 7, triggering the
SCR.
The SCR anode is directly connected to a solenoid or relay
coil. The SCR can be tripped only when its anode is more
positive than its cathode.
Supply Current Requirements
The RV4141A is powered directly from the line through a
series limiting resistor called RLINE, its value is between
24 kΩ and 91 kΩ. The controller IC has a built-in diode
rectifier eliminating the need for external power diodes.
The recommended value for RLINE is 24 kΩ to 47 kΩ for
110V systems and 47 kΩ to 91 kΩ for 220V systems. When
RLINE is 47 kΩ the shunt regulator current is limited to
3.6 mA. The recommended maximum peak line current
through RLINE is 10 mA.
GFCI Application (Refer to Figure 1)
The GFCI detects a ground fault by sensing a difference cur-
rent in the line and neutral wires. The difference current is
assumed to be a fault current creating a potentially hazardous
path from line to ground. Since the line and neutral wires
pass through the center of the sense transformer, only the dif-
ferential primary current is transferred to the secondary.
Assuming the turns ratio is 1:1000 the secondary current is
1/1000th the fault current. The RV4141A’s sense amplifier
converts the secondary current to a voltage which is com-
pared with either of the two window detector reference volt-
ages. If the fault current exceeds the design value for the
duration of the programmed time delay, the RV4141A will
send a current pulse to the gate of the SCR.
Detecting ground to neutral faults is more difficult. RB repre-
sents a normal ground fault resistance, RN is the wire resis-
tance of the electrical circuit between load/ neutral and earth
ground. RG represents the ground to neutral fault condition.
According to UL 943, the GFCI must trip when RN = 0.4Ω,
RG = 1.6Ω and the normal ground fault is 6 mA.
Assuming the ground fault to be 5 mA, 1 mA and 4 mA will
go through RG and RN, respectively, causing an effective 1
mA fault current. This current is detected by the sense trans-
former and amplified by the sense amplifier. The ground/
neutral and sense transformers are now mutually coupled by
RG, RN and the neutral wire ground loop, producing a posi-
tive feedback loop around the sense amplifier. The newly
created feedback loop causes the sense amplifier to oscillate
at a frequency determined by ground/neutral transformer
secondary inductance and C4. Typically it occurs at 8 KHz.
C2 is used to program the time required for the fault to be
present before the SCR is triggered. Refer to the equation
below for calculating the value of C2. Its typical value is
12 nF for a 2 ms delay.
RSET is used to set the fault current at which the GFCI trips.
When used with a 1:1000 sense transformer, its typical value
is 1 MΩ for a GFCI designed to trip at 5 mA.
RIN should be the highest value possible which ensures a
predictable secondary current from the sense transformer.
If RIN is set too high, normal production variations in the
transformer permeability will cause unit to unit variations in
the secondary current. If it is too low, a large offset voltage
error at Pin 1 will be present. This error voltage in turn cre-
ates a trip current error proportional to the input offset volt-
age of the sense amplifier. As an example, if RIN is 500Ω,
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REV. 1.0.6 6/30/05