RFP12N10L Datasheet, PDF (4/6 Pages) Fairchild Semiconductor – 12A, 100V, 0.200 Ohm, Logic Level, N-Channel Power MOSFET

RFP12N10L
Typical Performance Curves Unless Otherwise Specified (Continued)
1.3
V_DS = V_GS
1.2 I_D = 250µA
1.1
1.0
0.9
0.8
0.7
0.6
0.5
-50
0
50
100
150
T_J, JUNCTION TEMPERATURE (^oC)
FIGURE 7. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
800
V_GS = 0V, f = 1MHz
C_ISS = C_GS + C_GD
C_RSS = C_GD
600
C_OSS ≈ C_DS + C_GD
C_ISS
400
200
C_OSS
C_RSS
0
0
10
20
30
40
50
V_DS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 8. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
100 _BVDSS
10
R_L = 8.33Ω
I_{G (REF)} = 0.56mA
8
75
V_GS = 5V
GATE
V_DD
=
BV_DSS
SOURCE
VOLTAGE
V_DD
=
BV_DSS
6
50
4
25
0.75BV_DSS
0.50BV_DSS
0.25BV_DSS
DRAIN SOURCE
VOLTAGE
0
20 ^{IG (REF)}
I_G (ACT)
t, TIME (µs)
2
0
80 ^{IG (REF)}
I_G (ACT)
NOTE: Refer to Fairchild Applications Notes AN7254 and AN7260
FIGURE 9. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
R_L
+
R_G
V_DD
-
DUT
V_GS
FIGURE 10. SWITCHING TIME TEST CIRCUIT
V_DS
t_ON
t_d(ON)
t_r
90%
t_OFF
t_d(OFF)
t_f
90%
10%
0
V_GS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 11. RESISTIVE SWITCHING WAVEFORMS
©2002 Fairchild Semiconductor Corporation
RFP12N10L Rev. B